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[95.125.227.10]) by smtp.gmail.com with ESMTPSA id h17sm8510300wmb.44.2021.11.11.03.33.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 11 Nov 2021 03:33:43 -0800 (PST) Subject: Re: [PATCH v3 13/20] target/riscv: Fix RESERVED field length in VTYPE From: Richard Henderson To: LIU Zhiwei , qemu-devel@nongnu.org, qemu-riscv@nongnu.org References: <20211111055800.42672-1-zhiwei_liu@c-sky.com> <20211111055800.42672-14-zhiwei_liu@c-sky.com> <8f43db00-bd51-cadc-4c57-0db699a96aa0@linaro.org> Message-ID: <6b23e7f0-43ff-8782-f193-e5e6394f1ffc@linaro.org> Date: Thu, 11 Nov 2021 12:33:41 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <8f43db00-bd51-cadc-4c57-0db699a96aa0@linaro.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::42e (failed) Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=richard.henderson@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -52 X-Spam_score: -5.3 X-Spam_bar: ----- X-Spam_report: (-5.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-3.999, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, bin.meng@windriver.com, Alistair.Francis@wdc.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 11/11/21 12:33 PM, Richard Henderson wrote: > On 11/11/21 6:57 AM, LIU Zhiwei wrote: >> Signed-off-by: LIU Zhiwei >> --- >>   target/riscv/cpu.h | 2 +- >>   1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h >> index 52ce670cbe..b48c7c346c 100644 >> --- a/target/riscv/cpu.h >> +++ b/target/riscv/cpu.h >> @@ -105,7 +105,7 @@ typedef struct CPURISCVState CPURISCVState; >>   FIELD(VTYPE, VLMUL, 0, 2) >>   FIELD(VTYPE, VSEW, 2, 3) >>   FIELD(VTYPE, VEDIV, 5, 2) >> -FIELD(VTYPE, RESERVED, 7, sizeof(target_ulong) * 8 - 9) >> +FIELD(VTYPE, RESERVED, 7, sizeof(target_ulong) * 8 - 8) > > Or better, remove it in the next patch. Bah, nevermind. Reviewed-by: Richard Henderson r~