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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: "Alex Bennée" <alex.bennee@linaro.org>, qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>,
	David Hildenbrand <david@redhat.com>,
	Cornelia Huck <cohuck@redhat.com>, Thomas Huth <thuth@redhat.com>,
	"open list:S390 TCG CPUs" <qemu-s390x@nongnu.org>
Subject: Re: [RFC PATCH] target/s390x: fake instruction loading when handling 'ex'
Date: Wed, 19 Oct 2022 22:03:03 +0200	[thread overview]
Message-ID: <6b62a753-974d-968e-9e8f-a79e23a29719@linaro.org> (raw)
In-Reply-To: <20221019113552.1051940-1-alex.bennee@linaro.org>

On 19/10/22 13:35, Alex Bennée wrote:
> The s390x EXecute instruction is a bit weird as we synthesis the
> executed instruction from what we have stored in memory. When plugins
> are enabled this breaks because we detect the ld_code2() loading from
> a non zero offset without the rest of the instruction being there.
> 
> Work around this with a special helper to inform the rest of the
> translator about the instruction so things stay consistent.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Cc: Richard Henderson <richard.henderson@linaro.org>
> ---
>   include/exec/translator.h    | 17 +++++++++++++++++
>   target/s390x/tcg/translate.c |  4 ++++
>   2 files changed, 21 insertions(+)
> 
> diff --git a/include/exec/translator.h b/include/exec/translator.h
> index 3b77f5f4aa..156f568701 100644
> --- a/include/exec/translator.h
> +++ b/include/exec/translator.h
> @@ -211,6 +211,23 @@ translator_ldq_swap(CPUArchState *env, DisasContextBase *db,
>       return ret;
>   }
>   
> +/**
> + * translator_fake_ldw - fake instruction load
> + * @insn16: 2 byte instruction
> + * @pc: program counter of instruction
> + *
> + * This is a special case helper used where the instruction we are
> + * about to translate comes from somewhere else (e.g. being
> + * re-synthesised for s390x "ex"). It ensures we update other areas of
> + * the translator with details of the executed instruction.
> + */
> +
> +static inline void translator_fake_ldw(uint16_t insn16, abi_ptr pc)
> +{
> +    plugin_insn_append(pc, &insn16, sizeof(insn16));
> +}
> +
> +
>   /*
>    * Return whether addr is on the same page as where disassembly started.
>    * Translators can use this to enforce the rule that only single-insn
> diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
> index 1d2dddab1c..a07b8b2d23 100644
> --- a/target/s390x/tcg/translate.c
> +++ b/target/s390x/tcg/translate.c
> @@ -6317,12 +6317,16 @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s)
>       if (unlikely(s->ex_value)) {
>           /* Drop the EX data now, so that it's clear on exception paths.  */
>           TCGv_i64 zero = tcg_const_i64(0);
> +        int i;
>           tcg_gen_st_i64(zero, cpu_env, offsetof(CPUS390XState, ex_value));
>           tcg_temp_free_i64(zero);
>   
>           /* Extract the values saved by EXECUTE.  */
>           insn = s->ex_value & 0xffffffffffff0000ull;
>           ilen = s->ex_value & 0xf;
> +        for (i = 0; i < ilen; i += 2) {

Is it worth guarding with #ifdef CONFIG_PLUGIN?

> +            translator_fake_ldw(extract64(insn, 48 - (i * 8), 16), pc + i);
> +        }
>           op = insn >> 56;
>       } else {
>           insn = ld_code2(env, s, pc);



  parent reply	other threads:[~2022-10-19 20:04 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-19 11:35 [RFC PATCH] target/s390x: fake instruction loading when handling 'ex' Alex Bennée
2022-10-19 15:55 ` Richard Henderson
2022-10-19 20:03 ` Philippe Mathieu-Daudé [this message]
2022-10-20 11:09   ` Alex Bennée

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