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[194.158.70.1]) by smtp.gmail.com with ESMTPSA id l15-20020a05600c4f0f00b003c706e177c1sm964730wmq.14.2022.10.19.13.03.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Oct 2022 13:03:05 -0700 (PDT) Message-ID: <6b62a753-974d-968e-9e8f-a79e23a29719@linaro.org> Date: Wed, 19 Oct 2022 22:03:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.3.2 Subject: Re: [RFC PATCH] target/s390x: fake instruction loading when handling 'ex' Content-Language: en-US To: =?UTF-8?Q?Alex_Benn=c3=a9e?= , qemu-devel@nongnu.org Cc: Richard Henderson , David Hildenbrand , Cornelia Huck , Thomas Huth , "open list:S390 TCG CPUs" References: <20221019113552.1051940-1-alex.bennee@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <20221019113552.1051940-1-alex.bennee@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 19/10/22 13:35, Alex Bennée wrote: > The s390x EXecute instruction is a bit weird as we synthesis the > executed instruction from what we have stored in memory. When plugins > are enabled this breaks because we detect the ld_code2() loading from > a non zero offset without the rest of the instruction being there. > > Work around this with a special helper to inform the rest of the > translator about the instruction so things stay consistent. > > Signed-off-by: Alex Bennée > Cc: Richard Henderson > --- > include/exec/translator.h | 17 +++++++++++++++++ > target/s390x/tcg/translate.c | 4 ++++ > 2 files changed, 21 insertions(+) > > diff --git a/include/exec/translator.h b/include/exec/translator.h > index 3b77f5f4aa..156f568701 100644 > --- a/include/exec/translator.h > +++ b/include/exec/translator.h > @@ -211,6 +211,23 @@ translator_ldq_swap(CPUArchState *env, DisasContextBase *db, > return ret; > } > > +/** > + * translator_fake_ldw - fake instruction load > + * @insn16: 2 byte instruction > + * @pc: program counter of instruction > + * > + * This is a special case helper used where the instruction we are > + * about to translate comes from somewhere else (e.g. being > + * re-synthesised for s390x "ex"). It ensures we update other areas of > + * the translator with details of the executed instruction. > + */ > + > +static inline void translator_fake_ldw(uint16_t insn16, abi_ptr pc) > +{ > + plugin_insn_append(pc, &insn16, sizeof(insn16)); > +} > + > + > /* > * Return whether addr is on the same page as where disassembly started. > * Translators can use this to enforce the rule that only single-insn > diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c > index 1d2dddab1c..a07b8b2d23 100644 > --- a/target/s390x/tcg/translate.c > +++ b/target/s390x/tcg/translate.c > @@ -6317,12 +6317,16 @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s) > if (unlikely(s->ex_value)) { > /* Drop the EX data now, so that it's clear on exception paths. */ > TCGv_i64 zero = tcg_const_i64(0); > + int i; > tcg_gen_st_i64(zero, cpu_env, offsetof(CPUS390XState, ex_value)); > tcg_temp_free_i64(zero); > > /* Extract the values saved by EXECUTE. */ > insn = s->ex_value & 0xffffffffffff0000ull; > ilen = s->ex_value & 0xf; > + for (i = 0; i < ilen; i += 2) { Is it worth guarding with #ifdef CONFIG_PLUGIN? > + translator_fake_ldw(extract64(insn, 48 - (i * 8), 16), pc + i); > + } > op = insn >> 56; > } else { > insn = ld_code2(env, s, pc);