From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com,
palmer@dabbelt.com, ajones@ventanamicro.com,
Fei Wu <wu.fei9@sanechips.com.cn>
Subject: Re: [PATCH v3 3/4] hw/riscv: Add server platform reference machine
Date: Thu, 30 Oct 2025 23:27:18 +0100 [thread overview]
Message-ID: <6bbb2e59-9e6d-4f65-a604-c5e0c69bb9f1@linaro.org> (raw)
In-Reply-To: <20250528200129.1548259-4-dbarboza@ventanamicro.com>
On 28/5/25 22:01, Daniel Henrique Barboza wrote:
> From: Fei Wu <wu.fei9@sanechips.com.cn>
>
> The RISC-V Server Platform specification[1] defines a standardized set
> of hardware and software capabilities, that portable system software,
> such as OS and hypervisors can rely on being present in a RISC-V server
> platform.
>
> A corresponding Qemu RISC-V server platform reference (rvsp-ref for
> short) machine type is added to provide a environment for firmware/OS
> development and testing. The main features included in rvsp-ref are:
>
> - Based on riscv virt machine type
> - A new memory map as close as virt machine as possible
> - A new virt CPU type rvsp-ref-cpu for server platform compliance
> - AIA
> - PCIe AHCI
> - PCIe NIC
> - No virtio device
> - No fw_cfg device
> - No ACPI table provided
> - Only minimal device tree nodes
>
> [1] https://github.com/riscv-non-isa/riscv-server-platform
>
> Signed-off-by: Fei Wu <fei2.wu@intel.com>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> ---
> configs/devices/riscv64-softmmu/default.mak | 1 +
> hw/riscv/Kconfig | 14 +
> hw/riscv/meson.build | 1 +
> hw/riscv/server_platform_ref.c | 1276 +++++++++++++++++++
> 4 files changed, 1292 insertions(+)
> create mode 100644 hw/riscv/server_platform_ref.c
>
> diff --git a/configs/devices/riscv64-softmmu/default.mak b/configs/devices/riscv64-softmmu/default.mak
> index 39ed3a0061..0c4893b708 100644
> --- a/configs/devices/riscv64-softmmu/default.mak
> +++ b/configs/devices/riscv64-softmmu/default.mak
> @@ -9,5 +9,6 @@
> # CONFIG_SIFIVE_E=n
> # CONFIG_SIFIVE_U=n
> # CONFIG_RISCV_VIRT=n
> +# CONFIG_SERVER_PLATFORM_REF=n
> # CONFIG_MICROCHIP_PFSOC=n
> # CONFIG_SHAKTI_C=n
> diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig
> index e6a0ac1fa1..f626774c52 100644
> --- a/hw/riscv/Kconfig
> +++ b/hw/riscv/Kconfig
> @@ -69,6 +69,20 @@ config RISCV_VIRT
> select ACPI
> select ACPI_PCI
>
> +config SERVER_PLATFORM_REF
> + bool
> + default y
> + depends on RISCV64
> + select RISCV_NUMA
> + select GOLDFISH_RTC
> + select PCI
PCI is already selected by PCI_EXPRESS_GENERIC_BRIDGE.
> + select PCI_EXPRESS_GENERIC_BRIDGE
> + select PFLASH_CFI01
> + select SERIAL
> + select RISCV_ACLINT
> + select RISCV_APLIC
> + select RISCV_IMSIC
next prev parent reply other threads:[~2025-10-30 22:30 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-28 20:01 [PATCH v3 0/4] hw/riscv: Add Server Platform Reference Board Daniel Henrique Barboza
2025-05-28 20:01 ` [PATCH v3 1/4] target/riscv/cpu.c: remove 'bare' condition for .profile Daniel Henrique Barboza
2025-05-29 11:56 ` Andrew Jones
2025-05-28 20:01 ` [PATCH v3 2/4] target/riscv: Add server platform reference cpu Daniel Henrique Barboza
2025-05-29 11:56 ` Andrew Jones
2025-10-30 15:01 ` Chao Liu
2025-10-30 15:14 ` Daniel Henrique Barboza
2025-10-30 16:45 ` Chao Liu
2025-05-28 20:01 ` [PATCH v3 3/4] hw/riscv: Add server platform reference machine Daniel Henrique Barboza
2025-05-29 12:31 ` Andrew Jones
2025-10-30 22:27 ` Philippe Mathieu-Daudé [this message]
2025-05-28 20:01 ` [PATCH v3 4/4] hw/riscv/server_platform_ref.c: add riscv-iommu-sys Daniel Henrique Barboza
2025-05-29 12:33 ` Andrew Jones
2025-10-30 11:40 ` Chao Liu
2025-10-30 13:23 ` Daniel Henrique Barboza
2025-10-30 11:48 ` [PATCH v3 0/4] hw/riscv: Add Server Platform Reference Board Chao Liu
2025-10-30 13:33 ` Daniel Henrique Barboza
2025-10-30 15:23 ` Chao Liu
2025-10-30 15:37 ` Daniel Henrique Barboza
2025-10-30 20:53 ` Andrew Jones
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