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* [PATCH v2 0/4] Sparc CPU naming and help text improvements
@ 2024-04-19  8:48 Thomas Huth
  2024-04-19  8:48 ` [PATCH v2 1/4] target/sparc/cpu: Rename the CPU models with a "+" in their names Thomas Huth
                   ` (5 more replies)
  0 siblings, 6 replies; 10+ messages in thread
From: Thomas Huth @ 2024-04-19  8:48 UTC (permalink / raw)
  To: qemu-devel, Artyom Tarasenko, Mark Cave-Ayland
  Cc: Eduardo Habkost, Daniel P. Berrangé, Paolo Bonzini,
	Markus Armbruster

The Sparc CPU naming and the corresponding help text is somewhat
confusing for the users. We should avoid spaces in the Names and
provide clear information to the users what can be passed to the
"-cpu" option.
While we're at it, also remove the "+" from two of the CPU names
since this character is now not allowed in device names anymore
(and was worked around with an ugly hack in qom/object.c so far).

v2:
- Use "Sun-UltraSparc-IIIi-plus" and "Sun-UltraSparc-IV-plus"
  instead of just adding a "p" at the end
- Drop the sentence about NetBSD and OpenBSD in the docs since
  these problems are likely fixed since a long time already
- Added Reviewed-bys from earlier series and updated the patch
  descriptions a little bit

Thomas Huth (4):
  target/sparc/cpu: Rename the CPU models with a "+" in their names
  target/sparc/cpu: Avoid spaces by default in the CPU names
  docs/system/target-sparc: Improve the Sparc documentation
  docs/about: Deprecate the old "UltraSparc" CPU names that contain a
    "+"

 docs/about/deprecated.rst    |  9 +++++
 docs/system/target-sparc.rst | 12 ++++---
 qom/object.c                 |  8 -----
 target/sparc/cpu.c           | 66 +++++++++++++++++++++---------------
 4 files changed, 54 insertions(+), 41 deletions(-)

-- 
2.44.0



^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v2 1/4] target/sparc/cpu: Rename the CPU models with a "+" in their names
  2024-04-19  8:48 [PATCH v2 0/4] Sparc CPU naming and help text improvements Thomas Huth
@ 2024-04-19  8:48 ` Thomas Huth
  2024-04-19  8:48 ` [PATCH v2 2/4] target/sparc/cpu: Avoid spaces by default in the CPU names Thomas Huth
                   ` (4 subsequent siblings)
  5 siblings, 0 replies; 10+ messages in thread
From: Thomas Huth @ 2024-04-19  8:48 UTC (permalink / raw)
  To: qemu-devel, Artyom Tarasenko, Mark Cave-Ayland
  Cc: Eduardo Habkost, Daniel P. Berrangé, Paolo Bonzini,
	Markus Armbruster

Commit b447378e12 ("qom/object: Limit type names to alphanumerical ...")
cut down the amount of allowed characters for QOM types to a saner set.
The "+" character was meant to be included in this set, so we had to
add a hack there to still allow the legacy names of POWER and Sparc64
CPUs. However, instead of putting such a hack in the common QOM code,
there is a much better place to do this: The sparc_cpu_class_by_name()
function which is used to look up the names of all Sparc CPUs.
Thus let's finally get rid of the "+" in the Sparc CPU names, and provide
backward compatibility for the old names via some simple checks in the
sparc_cpu_class_by_name() function.

Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 qom/object.c       |  8 --------
 target/sparc/cpu.c | 14 ++++++++++++--
 2 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/qom/object.c b/qom/object.c
index d4a001cf41..759e194972 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -158,14 +158,6 @@ static bool type_name_is_valid(const char *name)
                         "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
                         "0123456789-_.");
 
-    /* Allow some legacy names with '+' in it for compatibility reasons */
-    if (name[plen] == '+') {
-        if (plen >= 17 && g_str_has_prefix(name, "Sun-UltraSparc-I")) {
-            /* Allow "Sun-UltraSparc-IV+" and "Sun-UltraSparc-IIIi+" */
-            return true;
-        }
-    }
-
     return plen == slen;
 }
 
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index e820f50acf..774e234e09 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -314,7 +314,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "Sun UltraSparc IV+",
+        .name = "Sun UltraSparc IV plus",
         .iu_version = ((0x3eULL << 48) | (0x19ULL << 32) | (0x22ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_12,
@@ -323,7 +323,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES | CPU_FEATURE_CMT,
     },
     {
-        .name = "Sun UltraSparc IIIi+",
+        .name = "Sun UltraSparc IIIi plus",
         .iu_version = ((0x3eULL << 48) | (0x22ULL << 32) | (0ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_3,
@@ -762,6 +762,16 @@ static ObjectClass *sparc_cpu_class_by_name(const char *cpu_model)
     char *typename;
 
     typename = sparc_cpu_type_name(cpu_model);
+
+    /* Fix up legacy names with '+' in it */
+    if (g_str_equal(typename, SPARC_CPU_TYPE_NAME("Sun-UltraSparc-IV+"))) {
+        g_free(typename);
+        typename = g_strdup(SPARC_CPU_TYPE_NAME("Sun-UltraSparc-IV-plus"));
+    } else if (g_str_equal(typename, SPARC_CPU_TYPE_NAME("Sun-UltraSparc-IIIi+"))) {
+        g_free(typename);
+        typename = g_strdup(SPARC_CPU_TYPE_NAME("Sun-UltraSparc-IIIi-plus"));
+    }
+
     oc = object_class_by_name(typename);
     g_free(typename);
     return oc;
-- 
2.44.0



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v2 2/4] target/sparc/cpu: Avoid spaces by default in the CPU names
  2024-04-19  8:48 [PATCH v2 0/4] Sparc CPU naming and help text improvements Thomas Huth
  2024-04-19  8:48 ` [PATCH v2 1/4] target/sparc/cpu: Rename the CPU models with a "+" in their names Thomas Huth
@ 2024-04-19  8:48 ` Thomas Huth
  2024-04-19  8:48 ` [PATCH v2 3/4] docs/system/target-sparc: Improve the Sparc documentation Thomas Huth
                   ` (3 subsequent siblings)
  5 siblings, 0 replies; 10+ messages in thread
From: Thomas Huth @ 2024-04-19  8:48 UTC (permalink / raw)
  To: qemu-devel, Artyom Tarasenko, Mark Cave-Ayland
  Cc: Eduardo Habkost, Daniel P. Berrangé, Paolo Bonzini,
	Markus Armbruster

The output of "-cpu help" is currently rather confusing to the users:
It might not be fully clear which part of the output defines the CPU
names since the CPU names contain white spaces (which we later have to
convert into dashes internally). At best it's at least a nuisance since
the users might need to specify the CPU names with quoting on the command
line if they are not aware of the fact that the CPU names could be written
with dashes instead. So let's finally clean up this mess by using dashes
instead of white spaces for the CPU names, like we're doing it internally
later (and like we're doing it in most other targets of QEMU).
Note that it is still possible to pass the CPU names with spaces to the
"-cpu" option, since sparc_cpu_type_name() still translates those to "-".

Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2141
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 target/sparc/cpu.c | 56 +++++++++++++++++++++++-----------------------
 1 file changed, 28 insertions(+), 28 deletions(-)

diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 774e234e09..593c8d6867 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -206,7 +206,7 @@ void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu)
 static const sparc_def_t sparc_defs[] = {
 #ifdef TARGET_SPARC64
     {
-        .name = "Fujitsu Sparc64",
+        .name = "Fujitsu-Sparc64",
         .iu_version = ((0x04ULL << 48) | (0x02ULL << 32) | (0ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_12,
@@ -215,7 +215,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "Fujitsu Sparc64 III",
+        .name = "Fujitsu-Sparc64-III",
         .iu_version = ((0x04ULL << 48) | (0x03ULL << 32) | (0ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_12,
@@ -224,7 +224,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "Fujitsu Sparc64 IV",
+        .name = "Fujitsu-Sparc64-IV",
         .iu_version = ((0x04ULL << 48) | (0x04ULL << 32) | (0ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_12,
@@ -233,7 +233,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "Fujitsu Sparc64 V",
+        .name = "Fujitsu-Sparc64-V",
         .iu_version = ((0x04ULL << 48) | (0x05ULL << 32) | (0x51ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_12,
@@ -242,7 +242,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "TI UltraSparc I",
+        .name = "TI-UltraSparc-I",
         .iu_version = ((0x17ULL << 48) | (0x10ULL << 32) | (0x40ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_12,
@@ -251,7 +251,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "TI UltraSparc II",
+        .name = "TI-UltraSparc-II",
         .iu_version = ((0x17ULL << 48) | (0x11ULL << 32) | (0x20ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_12,
@@ -260,7 +260,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "TI UltraSparc IIi",
+        .name = "TI-UltraSparc-IIi",
         .iu_version = ((0x17ULL << 48) | (0x12ULL << 32) | (0x91ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_12,
@@ -269,7 +269,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "TI UltraSparc IIe",
+        .name = "TI-UltraSparc-IIe",
         .iu_version = ((0x17ULL << 48) | (0x13ULL << 32) | (0x14ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_12,
@@ -278,7 +278,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "Sun UltraSparc III",
+        .name = "Sun-UltraSparc-III",
         .iu_version = ((0x3eULL << 48) | (0x14ULL << 32) | (0x34ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_12,
@@ -287,7 +287,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "Sun UltraSparc III Cu",
+        .name = "Sun-UltraSparc-III-Cu",
         .iu_version = ((0x3eULL << 48) | (0x15ULL << 32) | (0x41ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_3,
@@ -296,7 +296,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "Sun UltraSparc IIIi",
+        .name = "Sun-UltraSparc-IIIi",
         .iu_version = ((0x3eULL << 48) | (0x16ULL << 32) | (0x34ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_12,
@@ -305,7 +305,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "Sun UltraSparc IV",
+        .name = "Sun-UltraSparc-IV",
         .iu_version = ((0x3eULL << 48) | (0x18ULL << 32) | (0x31ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_4,
@@ -314,7 +314,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "Sun UltraSparc IV plus",
+        .name = "Sun-UltraSparc-IV-plus",
         .iu_version = ((0x3eULL << 48) | (0x19ULL << 32) | (0x22ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_12,
@@ -323,7 +323,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES | CPU_FEATURE_CMT,
     },
     {
-        .name = "Sun UltraSparc IIIi plus",
+        .name = "Sun-UltraSparc-IIIi-plus",
         .iu_version = ((0x3eULL << 48) | (0x22ULL << 32) | (0ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_3,
@@ -332,7 +332,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "Sun UltraSparc T1",
+        .name = "Sun-UltraSparc-T1",
         /* defined in sparc_ifu_fdp.v and ctu.h */
         .iu_version = ((0x3eULL << 48) | (0x23ULL << 32) | (0x02ULL << 24)),
         .fpu_version = 0x00000000,
@@ -343,7 +343,7 @@ static const sparc_def_t sparc_defs[] = {
         | CPU_FEATURE_GL,
     },
     {
-        .name = "Sun UltraSparc T2",
+        .name = "Sun-UltraSparc-T2",
         /* defined in tlu_asi_ctl.v and n2_revid_cust.v */
         .iu_version = ((0x3eULL << 48) | (0x24ULL << 32) | (0x02ULL << 24)),
         .fpu_version = 0x00000000,
@@ -354,7 +354,7 @@ static const sparc_def_t sparc_defs[] = {
         | CPU_FEATURE_GL,
     },
     {
-        .name = "NEC UltraSparc I",
+        .name = "NEC-UltraSparc-I",
         .iu_version = ((0x22ULL << 48) | (0x10ULL << 32) | (0x40ULL << 24)),
         .fpu_version = 0x00000000,
         .mmu_version = mmu_us_12,
@@ -364,7 +364,7 @@ static const sparc_def_t sparc_defs[] = {
     },
 #else
     {
-        .name = "Fujitsu MB86904",
+        .name = "Fujitsu-MB86904",
         .iu_version = 0x04 << 24, /* Impl 0, ver 4 */
         .fpu_version = 4 << FSR_VER_SHIFT, /* FPU version 4 (Meiko) */
         .mmu_version = 0x04 << 24, /* Impl 0, ver 4 */
@@ -377,7 +377,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "Fujitsu MB86907",
+        .name = "Fujitsu-MB86907",
         .iu_version = 0x05 << 24, /* Impl 0, ver 5 */
         .fpu_version = 4 << FSR_VER_SHIFT, /* FPU version 4 (Meiko) */
         .mmu_version = 0x05 << 24, /* Impl 0, ver 5 */
@@ -390,7 +390,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "TI MicroSparc I",
+        .name = "TI-MicroSparc-I",
         .iu_version = 0x41000000,
         .fpu_version = 4 << FSR_VER_SHIFT,
         .mmu_version = 0x41000000,
@@ -403,7 +403,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_FEATURE_MUL | CPU_FEATURE_DIV,
     },
     {
-        .name = "TI MicroSparc II",
+        .name = "TI-MicroSparc-II",
         .iu_version = 0x42000000,
         .fpu_version = 4 << FSR_VER_SHIFT,
         .mmu_version = 0x02000000,
@@ -416,7 +416,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "TI MicroSparc IIep",
+        .name = "TI-MicroSparc-IIep",
         .iu_version = 0x42000000,
         .fpu_version = 4 << FSR_VER_SHIFT,
         .mmu_version = 0x04000000,
@@ -429,7 +429,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "TI SuperSparc 40", /* STP1020NPGA */
+        .name = "TI-SuperSparc-40", /* STP1020NPGA */
         .iu_version = 0x41000000, /* SuperSPARC 2.x */
         .fpu_version = 0 << FSR_VER_SHIFT,
         .mmu_version = 0x00000800, /* SuperSPARC 2.x, no MXCC */
@@ -442,7 +442,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "TI SuperSparc 50", /* STP1020PGA */
+        .name = "TI-SuperSparc-50", /* STP1020PGA */
         .iu_version = 0x40000000, /* SuperSPARC 3.x */
         .fpu_version = 0 << FSR_VER_SHIFT,
         .mmu_version = 0x01000800, /* SuperSPARC 3.x, no MXCC */
@@ -455,7 +455,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "TI SuperSparc 51",
+        .name = "TI-SuperSparc-51",
         .iu_version = 0x40000000, /* SuperSPARC 3.x */
         .fpu_version = 0 << FSR_VER_SHIFT,
         .mmu_version = 0x01000000, /* SuperSPARC 3.x, MXCC */
@@ -469,7 +469,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "TI SuperSparc 60", /* STP1020APGA */
+        .name = "TI-SuperSparc-60", /* STP1020APGA */
         .iu_version = 0x40000000, /* SuperSPARC 3.x */
         .fpu_version = 0 << FSR_VER_SHIFT,
         .mmu_version = 0x01000800, /* SuperSPARC 3.x, no MXCC */
@@ -482,7 +482,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "TI SuperSparc 61",
+        .name = "TI-SuperSparc-61",
         .iu_version = 0x44000000, /* SuperSPARC 3.x */
         .fpu_version = 0 << FSR_VER_SHIFT,
         .mmu_version = 0x01000000, /* SuperSPARC 3.x, MXCC */
@@ -496,7 +496,7 @@ static const sparc_def_t sparc_defs[] = {
         .features = CPU_DEFAULT_FEATURES,
     },
     {
-        .name = "TI SuperSparc II",
+        .name = "TI-SuperSparc-II",
         .iu_version = 0x40000000, /* SuperSPARC II 1.x */
         .fpu_version = 0 << FSR_VER_SHIFT,
         .mmu_version = 0x08000000, /* SuperSPARC II 1.x, MXCC */
-- 
2.44.0



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v2 3/4] docs/system/target-sparc: Improve the Sparc documentation
  2024-04-19  8:48 [PATCH v2 0/4] Sparc CPU naming and help text improvements Thomas Huth
  2024-04-19  8:48 ` [PATCH v2 1/4] target/sparc/cpu: Rename the CPU models with a "+" in their names Thomas Huth
  2024-04-19  8:48 ` [PATCH v2 2/4] target/sparc/cpu: Avoid spaces by default in the CPU names Thomas Huth
@ 2024-04-19  8:48 ` Thomas Huth
  2024-04-19 17:59   ` Mark Cave-Ayland
  2024-04-19 18:21   ` Peter Maydell
  2024-04-19  8:48 ` [PATCH v2 4/4] docs/about: Deprecate the old "UltraSparc" CPU names that contain a "+" Thomas Huth
                   ` (2 subsequent siblings)
  5 siblings, 2 replies; 10+ messages in thread
From: Thomas Huth @ 2024-04-19  8:48 UTC (permalink / raw)
  To: qemu-devel, Artyom Tarasenko, Mark Cave-Ayland
  Cc: Eduardo Habkost, Daniel P. Berrangé, Paolo Bonzini,
	Markus Armbruster

Add some words about how to enable or disable boolean features,
and remove the note about a Linux kernel being available on the
QEMU website (they have been removed long ago already), and the
note about NetBSD and OpenBSD still having issues (they should
work fine nowadays).

Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2141
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 docs/system/target-sparc.rst | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/docs/system/target-sparc.rst b/docs/system/target-sparc.rst
index 9ec8c90c14..54bd8b6ead 100644
--- a/docs/system/target-sparc.rst
+++ b/docs/system/target-sparc.rst
@@ -27,6 +27,11 @@ architecture machines:
 The emulation is somewhat complete. SMP up to 16 CPUs is supported, but
 Linux limits the number of usable CPUs to 4.
 
+The list of available CPUs can be viewed by starting QEMU with ``-cpu help``.
+Optional boolean features can be added with a "+" in front of the feature name,
+or disabled with a "-" in front of the name, for example
+``-cpu TI-SuperSparc-II,+float128``.
+
 QEMU emulates the following sun4m peripherals:
 
 -  IOMMU
@@ -55,8 +60,5 @@ OpenBIOS is a free (GPL v2) portable firmware implementation. The goal
 is to implement a 100% IEEE 1275-1994 (referred to as Open Firmware)
 compliant firmware.
 
-A sample Linux 2.6 series kernel and ram disk image are available on the
-QEMU web site. There are still issues with NetBSD and OpenBSD, but most
-kernel versions work. Please note that currently older Solaris kernels
-don't work probably due to interface issues between OpenBIOS and
-Solaris.
+Please note that currently older Solaris kernels don't work probably due
+to interface issues between OpenBIOS and Solaris.
-- 
2.44.0



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v2 4/4] docs/about: Deprecate the old "UltraSparc" CPU names that contain a "+"
  2024-04-19  8:48 [PATCH v2 0/4] Sparc CPU naming and help text improvements Thomas Huth
                   ` (2 preceding siblings ...)
  2024-04-19  8:48 ` [PATCH v2 3/4] docs/system/target-sparc: Improve the Sparc documentation Thomas Huth
@ 2024-04-19  8:48 ` Thomas Huth
  2024-04-19  8:59   ` Philippe Mathieu-Daudé
  2024-04-20 16:42 ` [PATCH v2 0/4] Sparc CPU naming and help text improvements Richard Henderson
  2024-04-29 21:03 ` Mark Cave-Ayland
  5 siblings, 1 reply; 10+ messages in thread
From: Thomas Huth @ 2024-04-19  8:48 UTC (permalink / raw)
  To: qemu-devel, Artyom Tarasenko, Mark Cave-Ayland
  Cc: Eduardo Habkost, Daniel P. Berrangé, Paolo Bonzini,
	Markus Armbruster

For consistency we should drop the names with a "+" in it in the
long run.

Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 docs/about/deprecated.rst | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
index 6b932961bc..70026c3c11 100644
--- a/docs/about/deprecated.rst
+++ b/docs/about/deprecated.rst
@@ -206,6 +206,15 @@ in the QEMU object model anymore. ``power5+``, ``power5+_v2.1``,
 an alias, but for consistency these will get removed in a future
 release, too. Use ``power5p_v2.1`` and ``power7p_v2.1`` instead.
 
+``Sun-UltraSparc-IIIi+`` and ``Sun-UltraSparc-IV+`` CPU names (since 9.1)
+'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
+
+The character "+" in device (and thus also CPU) names is not allowed
+in the QEMU object model anymore. ``Sun-UltraSparc-IIIi+`` and
+``Sun-UltraSparc-IV+`` are currently still supported via a workaround,
+but for consistency these will get removed in a future release, too.
+Use ``Sun-UltraSparc-IIIi-plus`` and ``Sun-UltraSparc-IV-plus`` instead.
+
 CRIS CPU architecture (since 9.0)
 '''''''''''''''''''''''''''''''''
 
-- 
2.44.0



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH v2 4/4] docs/about: Deprecate the old "UltraSparc" CPU names that contain a "+"
  2024-04-19  8:48 ` [PATCH v2 4/4] docs/about: Deprecate the old "UltraSparc" CPU names that contain a "+" Thomas Huth
@ 2024-04-19  8:59   ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-04-19  8:59 UTC (permalink / raw)
  To: Thomas Huth, qemu-devel, Artyom Tarasenko, Mark Cave-Ayland
  Cc: Eduardo Habkost, Daniel P. Berrangé, Paolo Bonzini,
	Markus Armbruster

On 19/4/24 10:48, Thomas Huth wrote:
> For consistency we should drop the names with a "+" in it in the
> long run.
> 
> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
>   docs/about/deprecated.rst | 9 +++++++++
>   1 file changed, 9 insertions(+)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v2 3/4] docs/system/target-sparc: Improve the Sparc documentation
  2024-04-19  8:48 ` [PATCH v2 3/4] docs/system/target-sparc: Improve the Sparc documentation Thomas Huth
@ 2024-04-19 17:59   ` Mark Cave-Ayland
  2024-04-19 18:21   ` Peter Maydell
  1 sibling, 0 replies; 10+ messages in thread
From: Mark Cave-Ayland @ 2024-04-19 17:59 UTC (permalink / raw)
  To: Thomas Huth, qemu-devel, Artyom Tarasenko
  Cc: Eduardo Habkost, Daniel P. Berrangé, Paolo Bonzini,
	Markus Armbruster

On 19/04/2024 09:48, Thomas Huth wrote:

> Add some words about how to enable or disable boolean features,
> and remove the note about a Linux kernel being available on the
> QEMU website (they have been removed long ago already), and the
> note about NetBSD and OpenBSD still having issues (they should
> work fine nowadays).
> 
> Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2141
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
>   docs/system/target-sparc.rst | 12 +++++++-----
>   1 file changed, 7 insertions(+), 5 deletions(-)
> 
> diff --git a/docs/system/target-sparc.rst b/docs/system/target-sparc.rst
> index 9ec8c90c14..54bd8b6ead 100644
> --- a/docs/system/target-sparc.rst
> +++ b/docs/system/target-sparc.rst
> @@ -27,6 +27,11 @@ architecture machines:
>   The emulation is somewhat complete. SMP up to 16 CPUs is supported, but
>   Linux limits the number of usable CPUs to 4.
>   
> +The list of available CPUs can be viewed by starting QEMU with ``-cpu help``.
> +Optional boolean features can be added with a "+" in front of the feature name,
> +or disabled with a "-" in front of the name, for example
> +``-cpu TI-SuperSparc-II,+float128``.
> +
>   QEMU emulates the following sun4m peripherals:
>   
>   -  IOMMU
> @@ -55,8 +60,5 @@ OpenBIOS is a free (GPL v2) portable firmware implementation. The goal
>   is to implement a 100% IEEE 1275-1994 (referred to as Open Firmware)
>   compliant firmware.
>   
> -A sample Linux 2.6 series kernel and ram disk image are available on the
> -QEMU web site. There are still issues with NetBSD and OpenBSD, but most
> -kernel versions work. Please note that currently older Solaris kernels
> -don't work probably due to interface issues between OpenBIOS and
> -Solaris.
> +Please note that currently older Solaris kernels don't work probably due
> +to interface issues between OpenBIOS and Solaris.

Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>


ATB,

Mark.



^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v2 3/4] docs/system/target-sparc: Improve the Sparc documentation
  2024-04-19  8:48 ` [PATCH v2 3/4] docs/system/target-sparc: Improve the Sparc documentation Thomas Huth
  2024-04-19 17:59   ` Mark Cave-Ayland
@ 2024-04-19 18:21   ` Peter Maydell
  1 sibling, 0 replies; 10+ messages in thread
From: Peter Maydell @ 2024-04-19 18:21 UTC (permalink / raw)
  To: Thomas Huth
  Cc: qemu-devel, Artyom Tarasenko, Mark Cave-Ayland, Eduardo Habkost,
	Daniel P. Berrangé, Paolo Bonzini, Markus Armbruster

On Fri, 19 Apr 2024 at 09:49, Thomas Huth <thuth@redhat.com> wrote:
>
> Add some words about how to enable or disable boolean features,
> and remove the note about a Linux kernel being available on the
> QEMU website (they have been removed long ago already), and the
> note about NetBSD and OpenBSD still having issues (they should
> work fine nowadays).
>
> Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2141
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
>  docs/system/target-sparc.rst | 12 +++++++-----
>  1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/docs/system/target-sparc.rst b/docs/system/target-sparc.rst
> index 9ec8c90c14..54bd8b6ead 100644
> --- a/docs/system/target-sparc.rst
> +++ b/docs/system/target-sparc.rst
> @@ -27,6 +27,11 @@ architecture machines:
>  The emulation is somewhat complete. SMP up to 16 CPUs is supported, but
>  Linux limits the number of usable CPUs to 4.
>
> +The list of available CPUs can be viewed by starting QEMU with ``-cpu help``.
> +Optional boolean features can be added with a "+" in front of the feature name,
> +or disabled with a "-" in front of the name, for example
> +``-cpu TI-SuperSparc-II,+float128``.
> +
>  QEMU emulates the following sun4m peripherals:
>
>  -  IOMMU
> @@ -55,8 +60,5 @@ OpenBIOS is a free (GPL v2) portable firmware implementation. The goal
>  is to implement a 100% IEEE 1275-1994 (referred to as Open Firmware)
>  compliant firmware.
>
> -A sample Linux 2.6 series kernel and ram disk image are available on the
> -QEMU web site. There are still issues with NetBSD and OpenBSD, but most
> -kernel versions work. Please note that currently older Solaris kernels
> -don't work probably due to interface issues between OpenBIOS and
> -Solaris.
> +Please note that currently older Solaris kernels don't work probably due
> +to interface issues between OpenBIOS and Solaris.

If we're touching this text anyway I guess we could clean up the
grammar: "don't work; this is probably due to".

thanks
-- PMM


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v2 0/4] Sparc CPU naming and help text improvements
  2024-04-19  8:48 [PATCH v2 0/4] Sparc CPU naming and help text improvements Thomas Huth
                   ` (3 preceding siblings ...)
  2024-04-19  8:48 ` [PATCH v2 4/4] docs/about: Deprecate the old "UltraSparc" CPU names that contain a "+" Thomas Huth
@ 2024-04-20 16:42 ` Richard Henderson
  2024-04-29 21:03 ` Mark Cave-Ayland
  5 siblings, 0 replies; 10+ messages in thread
From: Richard Henderson @ 2024-04-20 16:42 UTC (permalink / raw)
  To: Thomas Huth, qemu-devel, Artyom Tarasenko, Mark Cave-Ayland
  Cc: Eduardo Habkost, Daniel P. Berrangé, Paolo Bonzini,
	Markus Armbruster

On 4/19/24 01:48, Thomas Huth wrote:
> Thomas Huth (4):
>    target/sparc/cpu: Rename the CPU models with a "+" in their names
>    target/sparc/cpu: Avoid spaces by default in the CPU names
>    docs/system/target-sparc: Improve the Sparc documentation
>    docs/about: Deprecate the old "UltraSparc" CPU names that contain a
>      "+"

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v2 0/4] Sparc CPU naming and help text improvements
  2024-04-19  8:48 [PATCH v2 0/4] Sparc CPU naming and help text improvements Thomas Huth
                   ` (4 preceding siblings ...)
  2024-04-20 16:42 ` [PATCH v2 0/4] Sparc CPU naming and help text improvements Richard Henderson
@ 2024-04-29 21:03 ` Mark Cave-Ayland
  5 siblings, 0 replies; 10+ messages in thread
From: Mark Cave-Ayland @ 2024-04-29 21:03 UTC (permalink / raw)
  To: Thomas Huth, qemu-devel, Artyom Tarasenko
  Cc: Eduardo Habkost, Daniel P. Berrangé, Paolo Bonzini,
	Markus Armbruster

On 19/04/2024 09:48, Thomas Huth wrote:

> The Sparc CPU naming and the corresponding help text is somewhat
> confusing for the users. We should avoid spaces in the Names and
> provide clear information to the users what can be passed to the
> "-cpu" option.
> While we're at it, also remove the "+" from two of the CPU names
> since this character is now not allowed in device names anymore
> (and was worked around with an ugly hack in qom/object.c so far).
> 
> v2:
> - Use "Sun-UltraSparc-IIIi-plus" and "Sun-UltraSparc-IV-plus"
>    instead of just adding a "p" at the end
> - Drop the sentence about NetBSD and OpenBSD in the docs since
>    these problems are likely fixed since a long time already
> - Added Reviewed-bys from earlier series and updated the patch
>    descriptions a little bit
> 
> Thomas Huth (4):
>    target/sparc/cpu: Rename the CPU models with a "+" in their names
>    target/sparc/cpu: Avoid spaces by default in the CPU names
>    docs/system/target-sparc: Improve the Sparc documentation
>    docs/about: Deprecate the old "UltraSparc" CPU names that contain a
>      "+"
> 
>   docs/about/deprecated.rst    |  9 +++++
>   docs/system/target-sparc.rst | 12 ++++---
>   qom/object.c                 |  8 -----
>   target/sparc/cpu.c           | 66 +++++++++++++++++++++---------------
>   4 files changed, 54 insertions(+), 41 deletions(-)

Thanks! I've applied this to my qemu-sparc branch, along with Peter's suggested tweak 
to the grammar in patch 3.


ATB,

Mark.



^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2024-04-29 21:03 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
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2024-04-19  8:48 [PATCH v2 0/4] Sparc CPU naming and help text improvements Thomas Huth
2024-04-19  8:48 ` [PATCH v2 1/4] target/sparc/cpu: Rename the CPU models with a "+" in their names Thomas Huth
2024-04-19  8:48 ` [PATCH v2 2/4] target/sparc/cpu: Avoid spaces by default in the CPU names Thomas Huth
2024-04-19  8:48 ` [PATCH v2 3/4] docs/system/target-sparc: Improve the Sparc documentation Thomas Huth
2024-04-19 17:59   ` Mark Cave-Ayland
2024-04-19 18:21   ` Peter Maydell
2024-04-19  8:48 ` [PATCH v2 4/4] docs/about: Deprecate the old "UltraSparc" CPU names that contain a "+" Thomas Huth
2024-04-19  8:59   ` Philippe Mathieu-Daudé
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