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Thu, 20 Jun 2024 21:31:09 -0700 (PDT) Message-ID: <6c36a71f-f149-4a86-a015-d2a18129ac55@linaro.org> Date: Thu, 20 Jun 2024 21:31:07 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 5/9] target/arm: Make some MTE helpers widely available To: Gustavo Romero , qemu-devel@nongnu.org, philmd@linaro.org, peter.maydell@linaro.org, alex.bennee@linaro.org References: <20240617062849.3531745-1-gustavo.romero@linaro.org> <20240617062849.3531745-6-gustavo.romero@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: <20240617062849.3531745-6-gustavo.romero@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 6/16/24 23:28, Gustavo Romero wrote: > @@ -287,7 +256,7 @@ uint64_t HELPER(addsubg)(CPUARMState *env, uint64_t ptr, > return address_with_allocation_tag(ptr + offset, rtag); > } > > -static int load_tag1(uint64_t ptr, uint8_t *mem) > +inline int load_tag1(uint64_t ptr, uint8_t *mem) > { > int ofs = extract32(ptr, LOG2_TAG_GRANULE, 1) * 4; > return extract32(*mem, ofs, 4); > @@ -321,7 +290,7 @@ static void check_tag_aligned(CPUARMState *env, uint64_t ptr, uintptr_t ra) > } > > /* For use in a non-parallel context, store to the given nibble. */ > -static void store_tag1(uint64_t ptr, uint8_t *mem, int tag) > +inline void store_tag1(uint64_t ptr, uint8_t *mem, int tag) > { > int ofs = extract32(ptr, LOG2_TAG_GRANULE, 1) * 4; > *mem = deposit32(*mem, ofs, 4, tag); Move these two entirely to the header as static inline. In general, inline without static doesn't mean what you think. With that, Reviewed-by: Richard Henderson > diff --git a/target/arm/tcg/mte_helper.h b/target/arm/tcg/mte_helper.h > new file mode 100644 > index 0000000000..69ad8457f8 > --- /dev/null > +++ b/target/arm/tcg/mte_helper.h > @@ -0,0 +1,63 @@ > +/* > + * ARM MemTag operation helpers. > + * > + * This code is licensed under the GNU GPL v2 or later. > + * > + * SPDX-License-Identifier: LGPL-2.1-or-later > + */ > + > +#ifndef TARGET_ARM_MTE_H > +#define TARGET_ARM_MTE_H > + > +/** > + * allocation_tag_mem_probe: > + * @env: the cpu environment > + * @ptr_mmu_idx: the addressing regime to use for the virtual address > + * @ptr: the virtual address for which to look up tag memory > + * @ptr_access: the access to use for the virtual address > + * @ptr_size: the number of bytes in the normal memory access > + * @tag_access: the access to use for the tag memory > + * @probe: true to merely probe, never taking an exception > + * @ra: the return address for exception handling > + * > + * Our tag memory is formatted as a sequence of little-endian nibbles. > + * That is, the byte at (addr >> (LOG2_TAG_GRANULE + 1)) contains two > + * tags, with the tag at [3:0] for the lower addr and the tag at [7:4] > + * for the higher addr. > + * > + * Here, resolve the physical address from the virtual address, and return > + * a pointer to the corresponding tag byte. > + * > + * If there is no tag storage corresponding to @ptr, return NULL. > + * > + * If the page is inaccessible for @ptr_access, or has a watchpoint, there are > + * three options: > + * (1) probe = true, ra = 0 : pure probe -- we return NULL if the page is not > + * accessible, and do not take watchpoint traps. The calling code must > + * handle those cases in the right priority compared to MTE traps. > + * (2) probe = false, ra = 0 : probe, no fault expected -- the caller guarantees > + * that the page is going to be accessible. We will take watchpoint traps. > + * (3) probe = false, ra != 0 : non-probe -- we will take both memory access > + * traps and watchpoint traps. > + * (probe = true, ra != 0 is invalid and will assert.) > + */ > +uint8_t *allocation_tag_mem_probe(CPUARMState *env, int ptr_mmu_idx, > + uint64_t ptr, MMUAccessType ptr_access, > + int ptr_size, MMUAccessType tag_access, > + bool probe, uintptr_t ra); > +/** > + * load_tag1 - Load 1 tag (nibble) from byte > + * @ptr: The tagged address > + * @mem: The tag address (packed, 2 tags in byte) > + */ > +int load_tag1(uint64_t ptr, uint8_t *mem); > + > +/** > + * store_tag1 - Store 1 tag (nibble) into byte > + * @ptr: The tagged address > + * @mem: The tag address (packed, 2 tags in byte) > + * @tag: The tag to be stored in the nibble > + */ > +void store_tag1(uint64_t ptr, uint8_t *mem, int tag); > + > +#endif /* TARGET_ARM_MTE_H */