Re: [RFC PATCH 1/3] tcg/riscv: Fix base regsiter for qemu_ld/st

[LIU Zhiwei <zhiwei_liu@linux.alibaba.com>]

On 2022/10/20 19:18, Richard Henderson wrote:
> On 10/20/22 20:41, LIU Zhiwei wrote:
>> When guest base is zero, we should use addr_regl as base regiser 
>> instead of
>> the initial register TCG_REG_TMP0.
>>
>> Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
>> ---
>>   tcg/riscv/tcg-target.c.inc | 4 ++++
>>   1 file changed, 4 insertions(+)
>>
>> diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
>> index 81a83e45b1..32f4bc7bfc 100644
>> --- a/tcg/riscv/tcg-target.c.inc
>> +++ b/tcg/riscv/tcg-target.c.inc
>> @@ -1185,6 +1185,8 @@ static void tcg_out_qemu_ld(TCGContext *s, 
>> const TCGArg *args, bool is_64)
>>       }
>>       if (guest_base != 0) {
>>           tcg_out_opc_reg(s, OPC_ADD, base, TCG_GUEST_BASE_REG, 
>> addr_regl);
>> +    } else {
>> +        base = addr_regl;
>>       }
>
> You're right that there's a bug here, where TMP0 remains 
> uninitialized.  I think it would be better to reorg the other 
> direction: begin with initializeing base = addr_regl, 

Do you mean only in user mode? I see TCG_REG_TMP0 has been used in 
tcg_out_tlb_load when  system mode.

Best Regards,
Zhiwei

> and then change it away only when we make modifications.
>
> r~