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From: "Cédric Le Goater" <clg@kaod.org>
To: Joel Stanley <joel@jms.id.au>, Peter Maydell <peter.maydell@linaro.org>
Cc: Andrew Jeffery <andrew@aj.id.au>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] aspeed: Register all watchdogs
Date: Wed, 28 Jun 2017 13:57:01 +0200	[thread overview]
Message-ID: <6c9540fe-9acb-c1ab-9f19-b59682b8fd4c@kaod.org> (raw)
In-Reply-To: <20170628114717.22349-1-joel@jms.id.au>

On 06/28/2017 01:47 PM, Joel Stanley wrote:
> The ast2400 contains two and the ast2500 contains three watchdogs.
> Add this information to the AspeedSoCInfo and realise the correct number
> of watchdogs for that each SoC type.
> 
> Signed-off-by: Joel Stanley <joel@jms.id.au>

Reviewed-and-tested-by: Cédric Le Goater <clg@kaod.org>

Thanks,

C.

> ---
>  hw/arm/aspeed_soc.c         | 25 +++++++++++++++++--------
>  include/hw/arm/aspeed_soc.h |  4 +++-
>  2 files changed, 20 insertions(+), 9 deletions(-)
> 
> diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
> index 4937e2bc8323..3034849c80bf 100644
> --- a/hw/arm/aspeed_soc.c
> +++ b/hw/arm/aspeed_soc.c
> @@ -62,6 +62,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
>          .spi_bases    = aspeed_soc_ast2400_spi_bases,
>          .fmc_typename = "aspeed.smc.fmc",
>          .spi_typename = aspeed_soc_ast2400_typenames,
> +        .wdts_num     = 2,
>      }, {
>          .name         = "ast2400-a1",
>          .cpu_model    = "arm926",
> @@ -72,6 +73,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
>          .spi_bases    = aspeed_soc_ast2400_spi_bases,
>          .fmc_typename = "aspeed.smc.fmc",
>          .spi_typename = aspeed_soc_ast2400_typenames,
> +        .wdts_num     = 2,
>      }, {
>          .name         = "ast2400",
>          .cpu_model    = "arm926",
> @@ -82,6 +84,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
>          .spi_bases    = aspeed_soc_ast2400_spi_bases,
>          .fmc_typename = "aspeed.smc.fmc",
>          .spi_typename = aspeed_soc_ast2400_typenames,
> +        .wdts_num     = 2,
>      }, {
>          .name         = "ast2500-a1",
>          .cpu_model    = "arm1176",
> @@ -92,6 +95,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
>          .spi_bases    = aspeed_soc_ast2500_spi_bases,
>          .fmc_typename = "aspeed.smc.ast2500-fmc",
>          .spi_typename = aspeed_soc_ast2500_typenames,
> +        .wdts_num     = 3,
>      },
>  };
>  
> @@ -175,9 +179,11 @@ static void aspeed_soc_init(Object *obj)
>      object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc),
>                                "ram-size", &error_abort);
>  
> -    object_initialize(&s->wdt, sizeof(s->wdt), TYPE_ASPEED_WDT);
> -    object_property_add_child(obj, "wdt", OBJECT(&s->wdt), NULL);
> -    qdev_set_parent_bus(DEVICE(&s->wdt), sysbus_get_default());
> +    for (i = 0; i < sc->info->wdts_num; i++) {
> +        object_initialize(&s->wdt[i], sizeof(s->wdt[i]), TYPE_ASPEED_WDT);
> +        object_property_add_child(obj, "wdt[*]", OBJECT(&s->wdt[i]), NULL);
> +        qdev_set_parent_bus(DEVICE(&s->wdt[i]), sysbus_get_default());
> +    }
>  
>      object_initialize(&s->ftgmac100, sizeof(s->ftgmac100), TYPE_FTGMAC100);
>      object_property_add_child(obj, "ftgmac100", OBJECT(&s->ftgmac100), NULL);
> @@ -300,12 +306,15 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
>      sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdmc), 0, ASPEED_SOC_SDMC_BASE);
>  
>      /* Watch dog */
> -    object_property_set_bool(OBJECT(&s->wdt), true, "realized", &err);
> -    if (err) {
> -        error_propagate(errp, err);
> -        return;
> +    for (i = 0; i < sc->info->wdts_num; i++) {
> +        object_property_set_bool(OBJECT(&s->wdt[i]), true, "realized", &err);
> +        if (err) {
> +            error_propagate(errp, err);
> +            return;
> +        }
> +        sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0,
> +                        ASPEED_SOC_WDT_BASE + i * 0x20);
>      }
> -    sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt), 0, ASPEED_SOC_WDT_BASE);
>  
>      /* Net */
>      qdev_set_nic_properties(DEVICE(&s->ftgmac100), &nd_table[0]);
> diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
> index 4c5fc66a1ee0..0b88baaad00e 100644
> --- a/include/hw/arm/aspeed_soc.h
> +++ b/include/hw/arm/aspeed_soc.h
> @@ -23,6 +23,7 @@
>  #include "hw/net/ftgmac100.h"
>  
>  #define ASPEED_SPIS_NUM  2
> +#define ASPEED_WDTS_NUM  3
>  
>  typedef struct AspeedSoCState {
>      /*< private >*/
> @@ -39,7 +40,7 @@ typedef struct AspeedSoCState {
>      AspeedSMCState fmc;
>      AspeedSMCState spi[ASPEED_SPIS_NUM];
>      AspeedSDMCState sdmc;
> -    AspeedWDTState wdt;
> +    AspeedWDTState wdt[ASPEED_WDTS_NUM];
>      FTGMAC100State ftgmac100;
>  } AspeedSoCState;
>  
> @@ -56,6 +57,7 @@ typedef struct AspeedSoCInfo {
>      const hwaddr *spi_bases;
>      const char *fmc_typename;
>      const char **spi_typename;
> +    int wdts_num;
>  } AspeedSoCInfo;
>  
>  typedef struct AspeedSoCClass {
> 

       reply	other threads:[~2017-06-28 11:57 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20170628114717.22349-1-joel@jms.id.au>
2017-06-28 11:57 ` Cédric Le Goater [this message]
2017-06-29 12:32   ` [Qemu-devel] [PATCH] aspeed: Register all watchdogs Peter Maydell

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