From: Richard Henderson <richard.henderson@linaro.org>
To: remi.denis.courmont@huawei.com, qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH 11/17] target/arm: do S1_ptw_translate() before address space lookup
Date: Fri, 13 Nov 2020 13:28:00 -0800 [thread overview]
Message-ID: <6cc2a0d2-e8f1-ee35-3922-80e19e0b8a57@linaro.org> (raw)
In-Reply-To: <20201109141020.27234-11-remi.denis.courmont@huawei.com>
On 11/9/20 6:10 AM, remi.denis.courmont@huawei.com wrote:
> From: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
>
> In the secure stage 2 translation regime, the VSTCR.SW and VTCR.NSW
> bits can invert the secure flag for pagetable walks. This patchset
> allows S1_ptw_translate() to change the non-secure bit.
>
> Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
> ---
> target/arm/helper.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2020-11-13 21:32 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-09 13:56 [PATCHv2 00/17] ARM Secure EL2 extension Rémi Denis-Courmont
2020-11-09 14:10 ` [PATCH 01/17] target/arm: remove redundant tests remi.denis.courmont
2020-11-13 21:18 ` Richard Henderson
2020-11-09 14:10 ` [PATCH 02/17] target/arm: add arm_is_el2_enabled() helper remi.denis.courmont
2020-11-13 21:19 ` Richard Henderson
2020-11-09 14:10 ` [PATCH 03/17] target/arm: use arm_is_el2_enabled() where applicable remi.denis.courmont
2020-11-09 14:10 ` [PATCH 04/17] target/arm: use arm_hcr_el2_eff() " remi.denis.courmont
2020-11-09 14:10 ` [PATCH 05/17] target/arm: factor MDCR_EL2 common handling remi.denis.courmont
2020-11-09 14:10 ` [PATCH 06/17] target/arm: declare new AA64PFR0 bit-fields remi.denis.courmont
2020-11-09 14:10 ` [PATCH 07/17] target/arm: add 64-bit S-EL2 to EL exception table remi.denis.courmont
2020-11-09 14:10 ` [PATCH 08/17] target/arm: return the stage 2 index for stage 1 remi.denis.courmont
2020-11-09 14:10 ` [PATCH 09/17] target/arm: add MMU stage 1 for Secure EL2 remi.denis.courmont
2020-11-13 21:26 ` Richard Henderson
2020-11-09 14:10 ` [PATCH 10/17] target/arm: add ARMv8.4-SEL2 system registers remi.denis.courmont
2020-11-13 21:27 ` Richard Henderson
2020-11-09 14:10 ` [PATCH 11/17] target/arm: do S1_ptw_translate() before address space lookup remi.denis.courmont
2020-11-13 21:28 ` Richard Henderson [this message]
2020-11-09 14:10 ` [PATCH 12/17] target/arm: secure stage 2 translation regime remi.denis.courmont
2020-11-09 14:10 ` [PATCH 13/17] target/arm: handle VMID change in secure state remi.denis.courmont
2020-11-13 21:37 ` Richard Henderson
2020-11-09 14:10 ` [PATCH 14/17] target/arm: set HPFAR_EL2.NS on secure stage 2 faults remi.denis.courmont
2020-11-13 21:54 ` Richard Henderson
2020-11-09 14:10 ` [PATCH 15/17] target/arm: add ARMv8.4-SEL2 extension remi.denis.courmont
2020-11-09 14:10 ` [PATCH 16/17] target/arm: enable Secure EL2 in max CPU remi.denis.courmont
2020-11-09 14:10 ` [PATCH 17/17] target/arm: refactor vae1_tlbmask() remi.denis.courmont
2020-11-09 14:36 ` [PATCHv2 00/17] ARM Secure EL2 extension no-reply
-- strict thread matches above, loose matches on Subject: below --
2020-11-23 8:01 [PATCHv3 00/17] ARMv8.4 Secure EL2 Rémi Denis-Courmont
2020-11-23 8:02 ` [PATCH 11/17] target/arm: do S1_ptw_translate() before address space lookup remi.denis.courmont
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