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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: "Inès Varhol" <ines.varhol@telecom-paris.fr>, qemu-devel@nongnu.org
Cc: Laurent Vivier <lvivier@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	 Alistair Francis <alistair@alistair23.me>,
	Arnaud Minier <arnaud.minier@telecom-paris.fr>,
	qemu-arm@nongnu.org, Peter Maydell <peter.maydell@linaro.org>,
	Thomas Huth <thuth@redhat.com>
Subject: Re: [PATCH v3 3/3] hw/arm: Connect STM32L4x5 SYSCFG to STM32L4x5 SoC
Date: Thu, 4 Jan 2024 14:20:44 +0100	[thread overview]
Message-ID: <6cc8aa4d-33de-47e2-aa34-d22f2877d7c6@linaro.org> (raw)
In-Reply-To: <20231229164915.133199-4-ines.varhol@telecom-paris.fr>

On 29/12/23 17:47, Inès Varhol wrote:
> The SYSCFG input GPIOs aren't connected yet. When the STM32L4x5 GPIO
> device will be implemented, its output GPIOs will be connected to the
> SYSCFG input GPIOs.
> 
> Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
> ---
>   hw/arm/Kconfig                 |  1 +
>   hw/arm/stm32l4x5_soc.c         | 23 ++++++++++++++++++++++-
>   include/hw/arm/stm32l4x5_soc.h |  2 ++
>   3 files changed, 25 insertions(+), 1 deletion(-)


> diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c
> index 08b8a4c2ed..0581f4ce30 100644
> --- a/hw/arm/stm32l4x5_soc.c
> +++ b/hw/arm/stm32l4x5_soc.c
> @@ -37,6 +37,7 @@
>   #define SRAM2_SIZE (32 * KiB)
>   
>   #define EXTI_ADDR 0x40010400
> +#define SYSCFG_ADDR 0x40010000
>   
>   #define NUM_EXTI_IRQ 40
>   /* Match exti line connections with their CPU IRQ number */
> @@ -81,6 +82,8 @@ static void stm32l4x5_soc_initfn(Object *obj)
>   
>       object_initialize_child(obj, "exti", &s->exti, TYPE_STM32L4X5_EXTI);
>   
> +    object_initialize_child(obj, "syscfg", &s->syscfg, TYPE_STM32L4X5_SYSCFG);
> +
>       s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0);
>       s->refclk = qdev_init_clock_in(DEVICE(s), "refclk", NULL, NULL, 0);
>   }
> @@ -158,6 +161,20 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp)
>           return;
>       }
>   
> +    /* System configuration controller */
> +    dev = DEVICE(&s->syscfg);

No need for 'dev', use 'busdev' directly.

> +    if (!sysbus_realize(SYS_BUS_DEVICE(&s->syscfg), errp)) {
> +        return;
> +    }
> +    busdev = SYS_BUS_DEVICE(dev);
> +    sysbus_mmio_map(busdev, 0, SYSCFG_ADDR);
> +    /*
> +     * TODO: when the GPIO device is implemented, connect it
> +     * to SYCFG using `qdev_connect_gpio_out`, NUM_GPIOS and
> +     * GPIO_NUM_PINS.
> +     */
> +
> +    /* EXTI device */
>       dev = DEVICE(&s->exti);
>       if (!sysbus_realize(SYS_BUS_DEVICE(&s->exti), errp)) {
>           return;
> @@ -168,6 +185,11 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp)
>           sysbus_connect_irq(busdev, i, qdev_get_gpio_in(armv7m, exti_irq[i]));
>       }
>   
> +    for (i = 0; i < 16; i++) {

You can reduce 'i' scope.

> +        qdev_connect_gpio_out(DEVICE(&s->syscfg), i,
> +                              qdev_get_gpio_in(dev, i));
> +    }

Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Preferably using 'busdev':
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



  reply	other threads:[~2024-01-04 13:21 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-29 16:47 [PATCH v3 0/3] Add device STM32L4x5 SYSCFG Inès Varhol
2023-12-29 16:47 ` [PATCH v3 1/3] hw/misc: Implement " Inès Varhol
2024-01-05  5:12   ` Alistair Francis
2023-12-29 16:47 ` [PATCH v3 2/3] tests/qtest: Add STM32L4x5 SYSCFG QTest testcase Inès Varhol
2024-01-04 13:23   ` Philippe Mathieu-Daudé
2024-01-04 13:37   ` Philippe Mathieu-Daudé
2023-12-29 16:47 ` [PATCH v3 3/3] hw/arm: Connect STM32L4x5 SYSCFG to STM32L4x5 SoC Inès Varhol
2024-01-04 13:20   ` Philippe Mathieu-Daudé [this message]
2024-01-04 13:47 ` [PATCH v3 0/3] Add device STM32L4x5 SYSCFG Philippe Mathieu-Daudé

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