From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Dave Jiang <dave.jiang@intel.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Igor Mammedov <imammedo@redhat.com>,
Ani Sinha <anisinha@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Eduardo Habkost <eduardo@habkost.net>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Subject: [PULL v3 58/62] hw/cxl: Add QTG _DSM support for ACPI0017 device
Date: Sun, 22 Oct 2023 05:26:34 -0400 [thread overview]
Message-ID: <6cdd46f66ff91a9c13c5dc4d018ae53d2f28d74a.1697966402.git.mst@redhat.com> (raw)
In-Reply-To: <cover.1697966402.git.mst@redhat.com>
From: Dave Jiang <dave.jiang@intel.com>
Add a simple _DSM call support for the ACPI0017 device to return fake QTG
ID values of 0 and 1 in all cases. This for _DSM plumbing testing from the OS.
Following edited for readability
Device (CXLM)
{
Name (_HID, "ACPI0017") // _HID: Hardware ID
...
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
If ((Arg0 == ToUUID ("f365f9a6-a7de-4071-a66a-b40c0b4f8e52")))
{
If ((Arg2 == Zero))
{
Return (Buffer (One) { 0x01 })
}
If ((Arg2 == One))
{
Return (Package (0x02)
{
One,
Package (0x02)
{
Zero,
One
}
})
}
}
}
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20231012125623.21101-3-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/acpi/cxl.h | 1 +
hw/acpi/cxl.c | 69 +++++++++++++++++++++++++++++++++++++++++++
hw/i386/acpi-build.c | 1 +
3 files changed, 71 insertions(+)
diff --git a/include/hw/acpi/cxl.h b/include/hw/acpi/cxl.h
index acf4418886..8f22c71530 100644
--- a/include/hw/acpi/cxl.h
+++ b/include/hw/acpi/cxl.h
@@ -25,5 +25,6 @@ void cxl_build_cedt(GArray *table_offsets, GArray *table_data,
BIOSLinker *linker, const char *oem_id,
const char *oem_table_id, CXLState *cxl_state);
void build_cxl_osc_method(Aml *dev);
+void build_cxl_dsm_method(Aml *dev);
#endif
diff --git a/hw/acpi/cxl.c b/hw/acpi/cxl.c
index 92b46bc932..9cd7905ea2 100644
--- a/hw/acpi/cxl.c
+++ b/hw/acpi/cxl.c
@@ -30,6 +30,75 @@
#include "qapi/error.h"
#include "qemu/uuid.h"
+void build_cxl_dsm_method(Aml *dev)
+{
+ Aml *method, *ifctx, *ifctx2;
+
+ method = aml_method("_DSM", 4, AML_SERIALIZED);
+ {
+ Aml *function, *uuid;
+
+ uuid = aml_arg(0);
+ function = aml_arg(2);
+ /* CXL spec v3.0 9.17.3.1 _DSM Function for Retrieving QTG ID */
+ ifctx = aml_if(aml_equal(
+ uuid, aml_touuid("F365F9A6-A7DE-4071-A66A-B40C0B4F8E52")));
+
+ /* Function 0, standard DSM query function */
+ ifctx2 = aml_if(aml_equal(function, aml_int(0)));
+ {
+ uint8_t byte_list[1] = { 0x01 }; /* function 1 only */
+
+ aml_append(ifctx2,
+ aml_return(aml_buffer(sizeof(byte_list), byte_list)));
+ }
+ aml_append(ifctx, ifctx2);
+
+ /*
+ * Function 1
+ * Creating a package with static values. The max supported QTG ID will
+ * be 1 and recommended QTG IDs are 0 and then 1.
+ * The values here are statically created to simplify emulation. Values
+ * from a real BIOS would be determined by the performance of all the
+ * present CXL memory and then assigned.
+ */
+ ifctx2 = aml_if(aml_equal(function, aml_int(1)));
+ {
+ Aml *pak, *pak1;
+
+ /*
+ * Return: A package containing two elements - a WORD that returns
+ * the maximum throttling group that the platform supports, and a
+ * package containing the QTG ID(s) that the platform recommends.
+ * Package {
+ * Max Supported QTG ID
+ * Package {QTG Recommendations}
+ * }
+ *
+ * While the SPEC specified WORD that hints at the value being
+ * 16bit, the ACPI dump of BIOS DSDT table showed that the values
+ * are integers with no specific size specification. aml_int() will
+ * be used for the values.
+ */
+ pak1 = aml_package(2);
+ /* Set QTG ID of 0 */
+ aml_append(pak1, aml_int(0));
+ /* Set QTG ID of 1 */
+ aml_append(pak1, aml_int(1));
+
+ pak = aml_package(2);
+ /* Set Max QTG 1 */
+ aml_append(pak, aml_int(1));
+ aml_append(pak, pak1);
+
+ aml_append(ifctx2, aml_return(pak));
+ }
+ aml_append(ifctx, ifctx2);
+ }
+ aml_append(method, ifctx);
+ aml_append(dev, method);
+}
+
static void cedt_build_chbs(GArray *table_data, PXBCXLDev *cxl)
{
PXBDev *pxb = PXB_DEV(cxl);
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index b0e1f074f1..80db183b78 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1417,6 +1417,7 @@ static void build_acpi0017(Aml *table)
method = aml_method("_STA", 0, AML_NOTSERIALIZED);
aml_append(method, aml_return(aml_int(0x01)));
aml_append(dev, method);
+ build_cxl_dsm_method(dev);
aml_append(scope, dev);
aml_append(table, scope);
--
MST
next prev parent reply other threads:[~2023-10-22 9:28 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-22 9:21 [PULL v3 00/62] virtio,pc,pci: features, cleanups Michael S. Tsirkin
2023-10-22 9:21 ` [PULL v3 01/62] vdpa: Use iovec for vhost_vdpa_net_cvq_add() Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 02/62] vdpa: Avoid using vhost_vdpa_net_load_*() outside vhost_vdpa_net_load() Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 03/62] vdpa: Check device ack in vhost_vdpa_net_load_rx_mode() Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 04/62] vdpa: Move vhost_svq_poll() to the caller of vhost_vdpa_net_cvq_add() Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 05/62] vdpa: Introduce cursors to vhost_vdpa_net_loadx() Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 06/62] vhost: Expose vhost_svq_available_slots() Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 07/62] vdpa: Send cvq state load commands in parallel Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 08/62] vhost-user: strip superfluous whitespace Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 09/62] vhost-user: tighten "reply_supported" scope in "set_vring_addr" Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 10/62] vhost-user: factor out "vhost_user_write_sync" Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 11/62] vhost-user: flatten "enforce_reply" into "vhost_user_write_sync" Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 12/62] vhost-user: hoist "write_sync", "get_features", "get_u64" Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 13/62] vhost-user: allow "vhost_set_vring" to wait for a reply Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 14/62] vhost-user: call VHOST_USER_SET_VRING_ENABLE synchronously Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 15/62] memory: initialize 'fv' in MemoryRegionCache to make Coverity happy Michael S. Tsirkin
2023-10-22 9:22 ` [PULL v3 16/62] vhost-user: do not send RESET_OWNER on device reset Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 17/62] vhost-backend: remove vhost_kernel_reset_device() Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 18/62] virtio: call ->vhost_reset_device() during reset Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 19/62] hw/i386/acpi-build: Remove build-time assertion on PIIX/ICH9 reset registers being identical Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 20/62] timer/i8254: Fix one shot PIT mode Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 21/62] hw/display: fix memleak from virtio_add_resource Michael S. Tsirkin
2023-10-24 6:19 ` Michael Tokarev
2023-10-22 9:23 ` [PULL v3 22/62] hw/i386/pc: Merge two if statements into one Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 23/62] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 24/62] hw/i386/pc_piix: Assign PIIX3's ISA interrupts before its realize() Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 25/62] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 26/62] hw/i386/pc_piix: Wire PIIX3's ISA interrupts by new "isa-irqs" property Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 27/62] hw/i386/pc_piix: Remove redundant "piix3" variable Michael S. Tsirkin
2023-10-22 9:23 ` [PULL v3 28/62] hw/isa/piix3: Rename "pic" attribute to "isa_irqs_in" Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 29/62] hw/i386/pc_q35: Wire ICH9 LPC function's interrupts before its realize() Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 30/62] hw/isa/piix3: Wire PIC IRQs to ISA bus in host device Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 31/62] hw/i386/pc: Wire RTC ISA IRQs in south bridges Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 32/62] hw/isa/piix3: Create IDE controller in host device Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 33/62] hw/isa/piix3: Create USB " Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 34/62] hw/isa/piix3: Create power management " Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 35/62] hw/isa/piix3: Drop the "3" from PIIX base class name Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 36/62] hw/isa/piix4: Remove unused inbound ISA interrupt lines Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 37/62] hw/isa/piix4: Rename "isa" attribute to "isa_irqs_in" Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 38/62] hw/isa/piix4: Rename reset control operations to match PIIX3 Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 39/62] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 40/62] hw/isa/piix3: Merge hw/isa/piix4.c Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 41/62] hw/isa/piix: Allow for optional PIC creation in PIIX3 Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 42/62] hw/isa/piix: Allow for optional PIT " Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 43/62] hw/isa/piix: Harmonize names of reset control memory regions Michael S. Tsirkin
2023-10-22 9:24 ` [PULL v3 44/62] hw/isa/piix: Share PIIX3's base class with PIIX4 Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 45/62] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 46/62] hw/isa/piix: Rename functions to be shared for PCI interrupt triggering Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 47/62] hw/isa/piix: Reuse PIIX3's PCI interrupt triggering in PIIX4 Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 48/62] hw/isa/piix: Resolve duplicate code regarding PCI interrupt wiring Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 49/62] hw/isa/piix: Implement multi-process QEMU support also for PIIX4 Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 50/62] hw/i386/pc_piix: Make PIIX4 south bridge usable in PC machine Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 51/62] vhost-user-common: send get_inflight_fd once Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 52/62] vhost: move and rename the conn retry times Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 53/62] vhost-user-scsi: support reconnect to backend Michael S. Tsirkin
2023-10-22 9:25 ` [PULL v3 54/62] vhost-user-scsi: start vhost when guest kicks Michael S. Tsirkin
2023-10-22 9:26 ` [PULL v3 55/62] vhost-user: fix lost reconnect Michael S. Tsirkin
2023-10-22 9:26 ` [PULL v3 56/62] hw/i386/cxl: ensure maxram is greater than ram size for calculating cxl range Michael S. Tsirkin
2023-10-22 9:26 ` [PULL v3 57/62] tests/acpi: Allow update of DSDT.cxl Michael S. Tsirkin
2023-10-22 9:26 ` Michael S. Tsirkin [this message]
2023-10-22 9:26 ` [PULL v3 59/62] tests/acpi: Update DSDT.cxl with QTG DSM Michael S. Tsirkin
2023-10-22 9:26 ` [PULL v3 60/62] vhost-user: Fix protocol feature bit conflict Michael S. Tsirkin
2023-10-22 9:26 ` [PULL v3 61/62] MAINTAINERS: Add include/hw/intc/i8259.h to the PC chip section Michael S. Tsirkin
2023-10-22 9:26 ` [PULL v3 62/62] intel-iommu: Report interrupt remapping faults, fix return value Michael S. Tsirkin
2023-10-24 1:15 ` [PULL v3 00/62] virtio,pc,pci: features, cleanups Stefan Hajnoczi
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