From: Richard Henderson <richard.henderson@linaro.org>
To: matheus.ferst@eldorado.org.br, qemu-devel@nongnu.org,
qemu-ppc@nongnu.org
Cc: clg@kaod.org, danielhb413@gmail.com, david@gibson.dropbear.id.au,
groug@kaod.org
Subject: Re: [PATCH] target/ppc: fix vbpermd in big endian hosts
Date: Fri, 3 Jun 2022 07:18:28 -0700 [thread overview]
Message-ID: <6ced0d40-a6bd-41d0-e233-86ba24c1dcab@linaro.org> (raw)
In-Reply-To: <20220601125355.1266165-1-matheus.ferst@eldorado.org.br>
On 6/1/22 05:53, matheus.ferst@eldorado.org.br wrote:
> From: Matheus Ferst<matheus.ferst@eldorado.org.br>
>
> The extract64 arguments are not endian dependent as they are only used
> for bitwise operations. The current behavior in little-endian hosts is
> correct; since the indexes in VRB are in PowerISA-ordering, we should
> always invert the value before calling extract64. Also, using the VsrD
> macro, we can have a single EXTRACT_BIT definition for big and
> little-endian with the correct behavior.
>
> Signed-off-by: Matheus Ferst<matheus.ferst@eldorado.org.br>
> ---
> Found this bug while refactoring VECTOR_FOR_INORDER_I uses. The
> complete patch series will also use Vsr[DB] instead of VBPERM[DQ]_INDEX,
> but it will need more testing. For now, we're just changing what is
> necessary to fix the instruction.
> ---
> target/ppc/int_helper.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2022-06-03 14:19 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-01 12:53 [PATCH] target/ppc: fix vbpermd in big endian hosts matheus.ferst
2022-06-01 14:21 ` Philippe Mathieu-Daudé via
2022-06-02 8:57 ` Mark Cave-Ayland
2022-06-03 14:18 ` Richard Henderson [this message]
2022-06-06 17:50 ` Daniel Henrique Barboza
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