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Sun, 07 Mar 2021 16:37:20 -0800 (PST) Received: from [192.168.1.11] ([71.212.131.83]) by smtp.gmail.com with ESMTPSA id g6sm8492195pfi.15.2021.03.07.16.37.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 07 Mar 2021 16:37:20 -0800 (PST) Subject: Re: [PATCH v2] target/m68k: implement rtr instruction To: Laurent Vivier , qemu-devel@nongnu.org References: <20210307182210.473111-1-laurent@vivier.eu> <8fb7faeb-f805-4ce8-d202-8613f3ea2aed@vivier.eu> From: Richard Henderson Message-ID: <6d297cb8-33b9-b83d-5dea-8b4c7d64044b@linaro.org> Date: Sun, 7 Mar 2021 16:37:18 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <8fb7faeb-f805-4ce8-d202-8613f3ea2aed@vivier.eu> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 3/7/21 11:08 AM, Laurent Vivier wrote: >> Both loads should happen (and thus exceptions recognized) before any other state writeback. > > Something like that? > > ccr = gen_load(s, OS_WORD, QREG_SP, 0, IS_USER(s)); > tcg_gen_addi_i32(QREG_SP, QREG_SP, 2); > tmp = gen_load(s, OS_LONG, QREG_SP, 0, IS_USER(s)); > tcg_gen_addi_i32(QREG_SP, QREG_SP, 4); Can't change SP before final load either. addr = tcg_temp_new_i32(); tcg_gen_addi_i32(addr, QREG_SP, 2); tmp = gen_load(s, OS_LONG, addr, 0, IS_USER(s)); tcg_gen_addi_i32(QREG_SP, addr, 4); tcg_temp_free_i32(addr); r~