From: Richard Henderson <richard.henderson@linaro.org>
To: LIU Zhiwei <zhiwei_liu@c-sky.com>,
qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: palmer@dabbelt.com, wenmeng_zhang@c-sky.com,
Alistair.Francis@wdc.com, ianjiang.ict@gmail.com,
wxy194768@alibaba-inc.com
Subject: Re: [PATCH 0/6] target/riscv: NaN-boxing for multiple precison
Date: Thu, 2 Jul 2020 10:37:27 -0700 [thread overview]
Message-ID: <6d2e6876-18a8-b32a-0879-565693b6d446@linaro.org> (raw)
In-Reply-To: <20200626205917.4545-1-zhiwei_liu@c-sky.com>
On 6/26/20 1:59 PM, LIU Zhiwei wrote:
> Multiple precison shoule be supported by NaN-boxing. That means, we should
> flush not valid NaN-boxing input to canonical NaN before effective
> calculation and we should NaN-boxing the result after the effective
> calculation.
>
> In this patch set, split the implementation to three steps for compute,
> sign-injection, and some covert insns, which are check_nanboxed,
> effective calculation and gen_nanbox_fpr.
>
> Check_nanboxed checks the inputs and flushes not valid inputs to cancical NaN.
> Effective calculation is direct calculation on fp32 values.
> Gen_nanbox_fpr does the NaN-boxing, writing the 1s to upper 32 bits.
I know I just reviewed a couple of these, but then I got to thinking about
patch 3 more closely.
I think it would be better to do all of the nan-boxing work inside of the
helpers, including the return values.
Since we must have a helper call for the actual fp arithmetic, we might as well
put the rest of the logic in there too. That way the JIT code is smaller.
If, for RVF && !RVD, we always maintain the invariant that the values are
nanboxed anyway, then we do not even have to check for RVD at runtime.
Thoughts?
r~
next prev parent reply other threads:[~2020-07-02 17:38 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-26 20:59 [PATCH 0/6] target/riscv: NaN-boxing for multiple precison LIU Zhiwei
2020-06-26 20:59 ` [PATCH 1/6] target/riscv: move gen_nanbox_fpr to translate.c LIU Zhiwei
2020-07-02 17:13 ` Richard Henderson
2020-06-26 20:59 ` [PATCH 2/6] target/riscv: NaN-boxing compute, sign-injection and convert instructions LIU Zhiwei
2020-07-02 17:15 ` Richard Henderson
2020-06-26 20:59 ` [PATCH 3/6] target/riscv: Check for LEGAL NaN-boxing LIU Zhiwei
2020-06-30 7:20 ` Chih-Min Chao
2020-06-30 7:31 ` LIU Zhiwei
2020-06-26 20:59 ` [PATCH 4/6] target/riscv: check before allocating TCG temps LIU Zhiwei
2020-07-02 17:13 ` Richard Henderson
2020-06-26 20:59 ` [PATCH 5/6] target/riscv: Flush not valid NaN-boxing input to canonical NaN LIU Zhiwei
2020-06-30 7:31 ` Chih-Min Chao
2020-06-30 7:37 ` LIU Zhiwei
2020-07-02 6:29 ` Chih-Min Chao
2020-06-26 20:59 ` [PATCH 6/6] target/riscv: clean up fmv.w.x LIU Zhiwei
2020-07-02 17:38 ` Richard Henderson
2020-06-26 21:21 ` [PATCH 0/6] target/riscv: NaN-boxing for multiple precison no-reply
2020-07-02 17:37 ` Richard Henderson [this message]
[not found] ` <3c139607-9cac-a28a-c296-b0e147b3b20f@c-sky.com>
2020-07-07 21:45 ` LIU Zhiwei
2020-07-08 15:35 ` Richard Henderson
2020-07-10 7:03 ` LIU Zhiwei
2020-07-10 16:03 ` Richard Henderson
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