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From: Miles Glenn <milesg@linux.ibm.com>
To: Nicholas Piggin <npiggin@gmail.com>, qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org, "Frédéric Barrat" <fbarrat@linux.ibm.com>,
	"Michael Kowal" <kowal@linux.ibm.com>,
	"Caleb Schlossin" <calebs@linux.vnet.ibm.com>
Subject: Re: [PATCH 28/50] ppc/xive: Change presenter .match_nvt to match not present
Date: Thu, 15 May 2025 10:53:52 -0500	[thread overview]
Message-ID: <6d301946daf6a554af50bbbf67c4ceacf69a8dbe.camel@linux.ibm.com> (raw)
In-Reply-To: <20250512031100.439842-29-npiggin@gmail.com>

Reviewed-by: Glenn Miles <milesg@linux.ibm.com>

On Mon, 2025-05-12 at 13:10 +1000, Nicholas Piggin wrote:
> Have the match_nvt method only perform a TCTX match but don't present
> the interrupt, the caller presents. This has no functional change, but
> allows for more complicated presentation logic after matching.
> 
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
>  hw/intc/pnv_xive.c    | 16 +++++++-------
>  hw/intc/pnv_xive2.c   | 16 +++++++-------
>  hw/intc/spapr_xive.c  | 18 +++++++--------
>  hw/intc/xive.c        | 51 +++++++++++++++----------------------------
>  hw/intc/xive2.c       | 31 +++++++++++++-------------
>  hw/ppc/pnv.c          | 48 ++++++++++++++--------------------------
>  hw/ppc/spapr.c        | 21 +++++++-----------
>  include/hw/ppc/xive.h | 27 +++++++++++++----------
>  8 files changed, 97 insertions(+), 131 deletions(-)
> 
> diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
> index ccbe95a58e..cdde8d0814 100644
> --- a/hw/intc/pnv_xive.c
> +++ b/hw/intc/pnv_xive.c
> @@ -470,14 +470,13 @@ static bool pnv_xive_is_cpu_enabled(PnvXive *xive, PowerPCCPU *cpu)
>      return xive->regs[reg >> 3] & PPC_BIT(bit);
>  }
>  
> -static int pnv_xive_match_nvt(XivePresenter *xptr, uint8_t format,
> -                              uint8_t nvt_blk, uint32_t nvt_idx,
> -                              bool crowd, bool cam_ignore, uint8_t priority,
> -                              uint32_t logic_serv, XiveTCTXMatch *match)
> +static bool pnv_xive_match_nvt(XivePresenter *xptr, uint8_t format,
> +                               uint8_t nvt_blk, uint32_t nvt_idx,
> +                               bool crowd, bool cam_ignore, uint8_t priority,
> +                               uint32_t logic_serv, XiveTCTXMatch *match)
>  {
>      PnvXive *xive = PNV_XIVE(xptr);
>      PnvChip *chip = xive->chip;
> -    int count = 0;
>      int i, j;
>  
>      for (i = 0; i < chip->nr_cores; i++) {
> @@ -510,17 +509,18 @@ static int pnv_xive_match_nvt(XivePresenter *xptr, uint8_t format,
>                      qemu_log_mask(LOG_GUEST_ERROR, "XIVE: already found a "
>                                    "thread context NVT %x/%x\n",
>                                    nvt_blk, nvt_idx);
> -                    return -1;
> +                    match->count++;
> +                    continue;
>                  }
>  
>                  match->ring = ring;
>                  match->tctx = tctx;
> -                count++;
> +                match->count++;
>              }
>          }
>      }
>  
> -    return count;
> +    return !!match->count;
>  }
>  
>  static uint32_t pnv_xive_presenter_get_config(XivePresenter *xptr)
> diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
> index 96b8851b7e..59b95e5219 100644
> --- a/hw/intc/pnv_xive2.c
> +++ b/hw/intc/pnv_xive2.c
> @@ -640,14 +640,13 @@ static bool pnv_xive2_is_cpu_enabled(PnvXive2 *xive, PowerPCCPU *cpu)
>      return xive->tctxt_regs[reg >> 3] & PPC_BIT(bit);
>  }
>  
> -static int pnv_xive2_match_nvt(XivePresenter *xptr, uint8_t format,
> -                               uint8_t nvt_blk, uint32_t nvt_idx,
> -                               bool crowd, bool cam_ignore, uint8_t priority,
> -                               uint32_t logic_serv, XiveTCTXMatch *match)
> +static bool pnv_xive2_match_nvt(XivePresenter *xptr, uint8_t format,
> +                                uint8_t nvt_blk, uint32_t nvt_idx,
> +                                bool crowd, bool cam_ignore, uint8_t priority,
> +                                uint32_t logic_serv, XiveTCTXMatch *match)
>  {
>      PnvXive2 *xive = PNV_XIVE2(xptr);
>      PnvChip *chip = xive->chip;
> -    int count = 0;
>      int i, j;
>      bool gen1_tima_os =
>          xive->cq_regs[CQ_XIVE_CFG >> 3] & CQ_XIVE_CFG_GEN1_TIMA_OS;
> @@ -692,7 +691,8 @@ static int pnv_xive2_match_nvt(XivePresenter *xptr, uint8_t format,
>                                    "thread context NVT %x/%x\n",
>                                    nvt_blk, nvt_idx);
>                      /* Should set a FIR if we ever model it */
> -                    return -1;
> +                    match->count++;
> +                    continue;
>                  }
>                  /*
>                   * For a group notification, we need to know if the
> @@ -717,13 +717,13 @@ static int pnv_xive2_match_nvt(XivePresenter *xptr, uint8_t format,
>                              }
>                          }
>                      }
> -                    count++;
> +                    match->count++;
>                  }
>              }
>          }
>      }
>  
> -    return count;
> +    return !!match->count;
>  }
>  
>  static uint32_t pnv_xive2_presenter_get_config(XivePresenter *xptr)
> diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
> index ce734b03ab..a7475d2f21 100644
> --- a/hw/intc/spapr_xive.c
> +++ b/hw/intc/spapr_xive.c
> @@ -428,14 +428,13 @@ static int spapr_xive_write_nvt(XiveRouter *xrtr, uint8_t nvt_blk,
>      g_assert_not_reached();
>  }
>  
> -static int spapr_xive_match_nvt(XivePresenter *xptr, uint8_t format,
> -                                uint8_t nvt_blk, uint32_t nvt_idx,
> -                                bool crowd, bool cam_ignore,
> -                                uint8_t priority,
> -                                uint32_t logic_serv, XiveTCTXMatch *match)
> +static bool spapr_xive_match_nvt(XivePresenter *xptr, uint8_t format,
> +                                 uint8_t nvt_blk, uint32_t nvt_idx,
> +                                 bool crowd, bool cam_ignore,
> +                                 uint8_t priority,
> +                                 uint32_t logic_serv, XiveTCTXMatch *match)
>  {
>      CPUState *cs;
> -    int count = 0;
>  
>      CPU_FOREACH(cs) {
>          PowerPCCPU *cpu = POWERPC_CPU(cs);
> @@ -463,16 +462,17 @@ static int spapr_xive_match_nvt(XivePresenter *xptr, uint8_t format,
>              if (match->tctx) {
>                  qemu_log_mask(LOG_GUEST_ERROR, "XIVE: already found a thread "
>                                "context NVT %x/%x\n", nvt_blk, nvt_idx);
> -                return -1;
> +                match->count++;
> +                continue;
>              }
>  
>              match->ring = ring;
>              match->tctx = tctx;
> -            count++;
> +            match->count++;
>          }
>      }
>  
> -    return count;
> +    return !!match->count;
>  }
>  
>  static uint32_t spapr_xive_presenter_get_config(XivePresenter *xptr)
> diff --git a/hw/intc/xive.c b/hw/intc/xive.c
> index ad30476c17..27b5a21371 100644
> --- a/hw/intc/xive.c
> +++ b/hw/intc/xive.c
> @@ -1762,8 +1762,8 @@ uint32_t xive_get_vpgroup_size(uint32_t nvp_index)
>      return 1U << (first_zero + 1);
>  }
>  
> -static uint8_t xive_get_group_level(bool crowd, bool ignore,
> -                                    uint32_t nvp_blk, uint32_t nvp_index)
> +uint8_t xive_get_group_level(bool crowd, bool ignore,
> +                             uint32_t nvp_blk, uint32_t nvp_index)
>  {
>      int first_zero;
>      uint8_t level;
> @@ -1881,15 +1881,14 @@ int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx,
>   * This is our simple Xive Presenter Engine model. It is merged in the
>   * Router as it does not require an extra object.
>   */
> -bool xive_presenter_notify(XiveFabric *xfb, uint8_t format,
> +bool xive_presenter_match(XiveFabric *xfb, uint8_t format,
>                             uint8_t nvt_blk, uint32_t nvt_idx,
>                             bool crowd, bool cam_ignore, uint8_t priority,
> -                           uint32_t logic_serv, bool *precluded)
> +                           uint32_t logic_serv, XiveTCTXMatch *match)
>  {
>      XiveFabricClass *xfc = XIVE_FABRIC_GET_CLASS(xfb);
> -    XiveTCTXMatch match = { .tctx = NULL, .ring = 0, .precluded = false };
> -    uint8_t group_level;
> -    int count;
> +
> +    memset(match, 0, sizeof(*match));
>  
>      /*
>       * Ask the machine to scan the interrupt controllers for a match.
> @@ -1914,22 +1913,8 @@ bool xive_presenter_notify(XiveFabric *xfb, uint8_t format,
>       * a new command to the presenters (the equivalent of the "assign"
>       * power bus command in the documented full notify sequence.
>       */
> -    count = xfc->match_nvt(xfb, format, nvt_blk, nvt_idx, crowd, cam_ignore,
> -                           priority, logic_serv, &match);
> -    if (count < 0) {
> -        return false;
> -    }
> -
> -    /* handle CPU exception delivery */
> -    if (count) {
> -        group_level = xive_get_group_level(crowd, cam_ignore, nvt_blk, nvt_idx);
> -        trace_xive_presenter_notify(nvt_blk, nvt_idx, match.ring, group_level);
> -        xive_tctx_pipr_update(match.tctx, match.ring, priority, group_level);
> -    } else {
> -        *precluded = match.precluded;
> -    }
> -
> -    return !!count;
> +    return xfc->match_nvt(xfb, format, nvt_blk, nvt_idx, crowd, cam_ignore,
> +                          priority, logic_serv, match);
>  }
>  
>  /*
> @@ -1966,7 +1951,7 @@ void xive_router_end_notify(XiveRouter *xrtr, XiveEAS *eas)
>      uint8_t nvt_blk;
>      uint32_t nvt_idx;
>      XiveNVT nvt;
> -    bool found, precluded;
> +    XiveTCTXMatch match;
>  
>      uint8_t end_blk = xive_get_field64(EAS_END_BLOCK, eas->w);
>      uint32_t end_idx = xive_get_field64(EAS_END_INDEX, eas->w);
> @@ -2046,16 +2031,16 @@ void xive_router_end_notify(XiveRouter *xrtr, XiveEAS *eas)
>          return;
>      }
>  
> -    found = xive_presenter_notify(xrtr->xfb, format, nvt_blk, nvt_idx,
> -                          false /* crowd */,
> -                          xive_get_field32(END_W7_F0_IGNORE, end.w7),
> -                          priority,
> -                          xive_get_field32(END_W7_F1_LOG_SERVER_ID, end.w7),
> -                          &precluded);
> -    /* we don't support VP-group notification on P9, so precluded is not used */
>      /* TODO: Auto EOI. */
> -
> -    if (found) {
> +    /* we don't support VP-group notification on P9, so precluded is not used */
> +    if (xive_presenter_match(xrtr->xfb, format, nvt_blk, nvt_idx,
> +                             false /* crowd */,
> +                             xive_get_field32(END_W7_F0_IGNORE, end.w7),
> +                             priority,
> +                             xive_get_field32(END_W7_F1_LOG_SERVER_ID, end.w7),
> +                             &match)) {
> +        trace_xive_presenter_notify(nvt_blk, nvt_idx, match.ring, 0);
> +        xive_tctx_pipr_update(match.tctx, match.ring, priority, 0);
>          return;
>      }
>  
> diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
> index ac94193464..6e136ad2e2 100644
> --- a/hw/intc/xive2.c
> +++ b/hw/intc/xive2.c
> @@ -1559,7 +1559,8 @@ static void xive2_router_end_notify(Xive2Router *xrtr, uint8_t end_blk,
>      Xive2End end;
>      uint8_t priority;
>      uint8_t format;
> -    bool found, precluded;
> +    XiveTCTXMatch match;
> +    bool crowd, cam_ignore;
>      uint8_t nvx_blk;
>      uint32_t nvx_idx;
>  
> @@ -1629,16 +1630,19 @@ static void xive2_router_end_notify(Xive2Router *xrtr, uint8_t end_blk,
>       */
>      nvx_blk = xive_get_field32(END2_W6_VP_BLOCK, end.w6);
>      nvx_idx = xive_get_field32(END2_W6_VP_OFFSET, end.w6);
> -
> -    found = xive_presenter_notify(xrtr->xfb, format, nvx_blk, nvx_idx,
> -                          xive2_end_is_crowd(&end), xive2_end_is_ignore(&end),
> -                          priority,
> -                          xive_get_field32(END2_W7_F1_LOG_SERVER_ID, end.w7),
> -                          &precluded);
> +    crowd = xive2_end_is_crowd(&end);
> +    cam_ignore = xive2_end_is_ignore(&end);
>  
>      /* TODO: Auto EOI. */
> -
> -    if (found) {
> +    if (xive_presenter_match(xrtr->xfb, format, nvx_blk, nvx_idx,
> +                             crowd, cam_ignore, priority,
> +                             xive_get_field32(END2_W7_F1_LOG_SERVER_ID, end.w7),
> +                             &match)) {
> +        uint8_t group_level;
> +
> +        group_level = xive_get_group_level(crowd, cam_ignore, nvx_blk, nvx_idx);
> +        trace_xive_presenter_notify(nvx_blk, nvx_idx, match.ring, group_level);
> +        xive_tctx_pipr_update(match.tctx, match.ring, priority, group_level);
>          return;
>      }
>  
> @@ -1656,7 +1660,7 @@ static void xive2_router_end_notify(Xive2Router *xrtr, uint8_t end_blk,
>              return;
>          }
>  
> -        if (!xive2_end_is_ignore(&end)) {
> +        if (!cam_ignore) {
>              uint8_t ipb;
>              Xive2Nvp nvp;
>  
> @@ -1685,9 +1689,6 @@ static void xive2_router_end_notify(Xive2Router *xrtr, uint8_t end_blk,
>          } else {
>              Xive2Nvgc nvgc;
>              uint32_t backlog;
> -            bool crowd;
> -
> -            crowd = xive2_end_is_crowd(&end);
>  
>              /*
>               * For groups and crowds, the per-priority backlog
> @@ -1719,9 +1720,7 @@ static void xive2_router_end_notify(Xive2Router *xrtr, uint8_t end_blk,
>              if (backlog == 1) {
>                  XiveFabricClass *xfc = XIVE_FABRIC_GET_CLASS(xrtr->xfb);
>                  xfc->broadcast(xrtr->xfb, nvx_blk, nvx_idx,
> -                               xive2_end_is_crowd(&end),
> -                               xive2_end_is_ignore(&end),
> -                               priority);
> +                               crowd, cam_ignore, priority);
>  
>                  if (!xive2_end_is_precluded_escalation(&end)) {
>                      /*
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index deb29a6389..0c17846b38 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -2619,62 +2619,46 @@ static void pnv_pic_print_info(InterruptStatsProvider *obj, GString *buf)
>      }
>  }
>  
> -static int pnv_match_nvt(XiveFabric *xfb, uint8_t format,
> -                         uint8_t nvt_blk, uint32_t nvt_idx,
> -                         bool crowd, bool cam_ignore, uint8_t priority,
> -                         uint32_t logic_serv,
> -                         XiveTCTXMatch *match)
> +static bool pnv_match_nvt(XiveFabric *xfb, uint8_t format,
> +                          uint8_t nvt_blk, uint32_t nvt_idx,
> +                          bool crowd, bool cam_ignore, uint8_t priority,
> +                          uint32_t logic_serv,
> +                          XiveTCTXMatch *match)
>  {
>      PnvMachineState *pnv = PNV_MACHINE(xfb);
> -    int total_count = 0;
>      int i;
>  
>      for (i = 0; i < pnv->num_chips; i++) {
>          Pnv9Chip *chip9 = PNV9_CHIP(pnv->chips[i]);
>          XivePresenter *xptr = XIVE_PRESENTER(&chip9->xive);
>          XivePresenterClass *xpc = XIVE_PRESENTER_GET_CLASS(xptr);
> -        int count;
>  
> -        count = xpc->match_nvt(xptr, format, nvt_blk, nvt_idx, crowd,
> -                               cam_ignore, priority, logic_serv, match);
> -
> -        if (count < 0) {
> -            return count;
> -        }
> -
> -        total_count += count;
> +        xpc->match_nvt(xptr, format, nvt_blk, nvt_idx, crowd,
> +                       cam_ignore, priority, logic_serv, match);
>      }
>  
> -    return total_count;
> +    return !!match->count;
>  }
>  
> -static int pnv10_xive_match_nvt(XiveFabric *xfb, uint8_t format,
> -                                uint8_t nvt_blk, uint32_t nvt_idx,
> -                                bool crowd, bool cam_ignore, uint8_t priority,
> -                                uint32_t logic_serv,
> -                                XiveTCTXMatch *match)
> +static bool pnv10_xive_match_nvt(XiveFabric *xfb, uint8_t format,
> +                                 uint8_t nvt_blk, uint32_t nvt_idx,
> +                                 bool crowd, bool cam_ignore, uint8_t priority,
> +                                 uint32_t logic_serv,
> +                                 XiveTCTXMatch *match)
>  {
>      PnvMachineState *pnv = PNV_MACHINE(xfb);
> -    int total_count = 0;
>      int i;
>  
>      for (i = 0; i < pnv->num_chips; i++) {
>          Pnv10Chip *chip10 = PNV10_CHIP(pnv->chips[i]);
>          XivePresenter *xptr = XIVE_PRESENTER(&chip10->xive);
>          XivePresenterClass *xpc = XIVE_PRESENTER_GET_CLASS(xptr);
> -        int count;
> -
> -        count = xpc->match_nvt(xptr, format, nvt_blk, nvt_idx, crowd,
> -                               cam_ignore, priority, logic_serv, match);
> -
> -        if (count < 0) {
> -            return count;
> -        }
>  
> -        total_count += count;
> +        xpc->match_nvt(xptr, format, nvt_blk, nvt_idx, crowd,
> +                       cam_ignore, priority, logic_serv, match);
>      }
>  
> -    return total_count;
> +    return !!match->count;
>  }
>  
>  static int pnv10_xive_broadcast(XiveFabric *xfb,
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index b0a0f8c689..93574d2a63 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -4468,21 +4468,14 @@ static void spapr_pic_print_info(InterruptStatsProvider *obj, GString *buf)
>  /*
>   * This is a XIVE only operation
>   */
> -static int spapr_match_nvt(XiveFabric *xfb, uint8_t format,
> -                           uint8_t nvt_blk, uint32_t nvt_idx,
> -                           bool crowd, bool cam_ignore, uint8_t priority,
> -                           uint32_t logic_serv, XiveTCTXMatch *match)
> +static bool spapr_match_nvt(XiveFabric *xfb, uint8_t format,
> +                            uint8_t nvt_blk, uint32_t nvt_idx,
> +                            bool crowd, bool cam_ignore, uint8_t priority,
> +                            uint32_t logic_serv, XiveTCTXMatch *match)
>  {
>      SpaprMachineState *spapr = SPAPR_MACHINE(xfb);
>      XivePresenter *xptr = XIVE_PRESENTER(spapr->active_intc);
>      XivePresenterClass *xpc = XIVE_PRESENTER_GET_CLASS(xptr);
> -    int count;
> -
> -    count = xpc->match_nvt(xptr, format, nvt_blk, nvt_idx, crowd, cam_ignore,
> -                           priority, logic_serv, match);
> -    if (count < 0) {
> -        return count;
> -    }
>  
>      /*
>       * When we implement the save and restore of the thread interrupt
> @@ -4493,12 +4486,14 @@ static int spapr_match_nvt(XiveFabric *xfb, uint8_t format,
>       * Until this is done, the sPAPR machine should find at least one
>       * matching context always.
>       */
> -    if (count == 0) {
> +    if (!xpc->match_nvt(xptr, format, nvt_blk, nvt_idx, crowd, cam_ignore,
> +                           priority, logic_serv, match)) {
>          qemu_log_mask(LOG_GUEST_ERROR, "XIVE: NVT %x/%x is not dispatched\n",
>                        nvt_blk, nvt_idx);
> +        return false;
>      }
>  
> -    return count;
> +    return true;
>  }
>  
>  int spapr_get_vcpu_id(PowerPCCPU *cpu)
> diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
> index 46d05d74fb..8152a9df3d 100644
> --- a/include/hw/ppc/xive.h
> +++ b/include/hw/ppc/xive.h
> @@ -425,6 +425,7 @@ void xive_router_end_notify(XiveRouter *xrtr, XiveEAS *eas);
>  
>  typedef struct XiveTCTXMatch {
>      XiveTCTX *tctx;
> +    int count;
>      uint8_t ring;
>      bool precluded;
>  } XiveTCTXMatch;
> @@ -440,10 +441,10 @@ DECLARE_CLASS_CHECKERS(XivePresenterClass, XIVE_PRESENTER,
>  
>  struct XivePresenterClass {
>      InterfaceClass parent;
> -    int (*match_nvt)(XivePresenter *xptr, uint8_t format,
> -                     uint8_t nvt_blk, uint32_t nvt_idx,
> -                     bool crowd, bool cam_ignore, uint8_t priority,
> -                     uint32_t logic_serv, XiveTCTXMatch *match);
> +    bool (*match_nvt)(XivePresenter *xptr, uint8_t format,
> +                      uint8_t nvt_blk, uint32_t nvt_idx,
> +                      bool crowd, bool cam_ignore, uint8_t priority,
> +                      uint32_t logic_serv, XiveTCTXMatch *match);
>      bool (*in_kernel)(const XivePresenter *xptr);
>      uint32_t (*get_config)(XivePresenter *xptr);
>      int (*broadcast)(XivePresenter *xptr,
> @@ -455,12 +456,14 @@ int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx,
>                                uint8_t format,
>                                uint8_t nvt_blk, uint32_t nvt_idx,
>                                bool cam_ignore, uint32_t logic_serv);
> -bool xive_presenter_notify(XiveFabric *xfb, uint8_t format,
> -                           uint8_t nvt_blk, uint32_t nvt_idx,
> -                           bool crowd, bool cam_ignore, uint8_t priority,
> -                           uint32_t logic_serv, bool *precluded);
> +bool xive_presenter_match(XiveFabric *xfb, uint8_t format,
> +                          uint8_t nvt_blk, uint32_t nvt_idx,
> +                          bool crowd, bool cam_ignore, uint8_t priority,
> +                          uint32_t logic_serv, XiveTCTXMatch *match);
>  
>  uint32_t xive_get_vpgroup_size(uint32_t nvp_index);
> +uint8_t xive_get_group_level(bool crowd, bool ignore,
> +                             uint32_t nvp_blk, uint32_t nvp_index);
>  
>  /*
>   * XIVE Fabric (Interface between Interrupt Controller and Machine)
> @@ -475,10 +478,10 @@ DECLARE_CLASS_CHECKERS(XiveFabricClass, XIVE_FABRIC,
>  
>  struct XiveFabricClass {
>      InterfaceClass parent;
> -    int (*match_nvt)(XiveFabric *xfb, uint8_t format,
> -                     uint8_t nvt_blk, uint32_t nvt_idx,
> -                     bool crowd, bool cam_ignore, uint8_t priority,
> -                     uint32_t logic_serv, XiveTCTXMatch *match);
> +    bool (*match_nvt)(XiveFabric *xfb, uint8_t format,
> +                      uint8_t nvt_blk, uint32_t nvt_idx,
> +                      bool crowd, bool cam_ignore, uint8_t priority,
> +                      uint32_t logic_serv, XiveTCTXMatch *match);
>      int (*broadcast)(XiveFabric *xfb, uint8_t nvt_blk, uint32_t nvt_idx,
>                       bool crowd, bool cam_ignore, uint8_t priority);
>  };



  parent reply	other threads:[~2025-05-15 15:54 UTC|newest]

Thread overview: 192+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-12  3:10 [PATCH 00/50] ppc/xive: updates for PowerVM Nicholas Piggin
2025-05-12  3:10 ` [PATCH 01/50] ppc/xive: Fix xive trace event output Nicholas Piggin
2025-05-14 14:26   ` Caleb Schlossin
2025-05-14 18:41   ` Mike Kowal
2025-05-15 15:30   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 02/50] ppc/xive: Report access size in XIVE TM operation error logs Nicholas Piggin
2025-05-14 14:27   ` Caleb Schlossin
2025-05-14 18:42   ` Mike Kowal
2025-05-15 15:31   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 03/50] ppc/xive2: Fix calculation of END queue sizes Nicholas Piggin
2025-05-14 14:27   ` Caleb Schlossin
2025-05-14 18:45   ` Mike Kowal
2025-05-16  0:06   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 04/50] ppc/xive2: Remote VSDs need to match on forwarding address Nicholas Piggin
2025-05-14 14:27   ` Caleb Schlossin
2025-05-14 18:46   ` Mike Kowal
2025-05-15 15:34   ` Miles Glenn
2025-05-16  0:08   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 05/50] ppc/xive2: fix context push calculation of IPB priority Nicholas Piggin
2025-05-14 14:30   ` Caleb Schlossin
2025-05-14 18:48   ` Mike Kowal
2025-05-15 15:36   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 06/50] ppc/xive: Fix PHYS NSR ring matching Nicholas Piggin
2025-05-14 14:30   ` Caleb Schlossin
2025-05-14 18:49   ` Mike Kowal
2025-05-15 15:39   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 07/50] ppc/xive2: Reset Generation Flipped bit on END Cache Watch Nicholas Piggin
2025-05-14 14:30   ` Caleb Schlossin
2025-05-14 18:50   ` Mike Kowal
2025-05-15 15:41   ` Miles Glenn
2025-05-16  0:09   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 08/50] ppc/xive2: Use fair irq target search algorithm Nicholas Piggin
2025-05-14 14:31   ` Caleb Schlossin
2025-05-14 18:51   ` Mike Kowal
2025-05-15 15:42   ` Miles Glenn
2025-05-16  0:12   ` Nicholas Piggin
2025-05-16 16:22     ` Mike Kowal
2025-05-12  3:10 ` [PATCH 09/50] ppc/xive2: Fix irq preempted by lower priority group irq Nicholas Piggin
2025-05-14 14:31   ` Caleb Schlossin
2025-05-14 18:52   ` Mike Kowal
2025-05-16  0:12   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 10/50] ppc/xive2: Fix treatment of PIPR in CPPR update Nicholas Piggin
2025-05-14 14:32   ` Caleb Schlossin
2025-05-14 18:53   ` Mike Kowal
2025-05-16  0:15   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 11/50] ppc/xive2: Do not present group interrupt on OS-push if precluded by CPPR Nicholas Piggin
2025-05-14 14:32   ` Caleb Schlossin
2025-05-14 18:54   ` Mike Kowal
2025-05-15 15:43   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 12/50] ppc/xive2: Set CPPR delivery should account for group priority Nicholas Piggin
2025-05-14 14:33   ` Caleb Schlossin
2025-05-14 18:57   ` Mike Kowal
2025-05-15 15:45   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 13/50] ppc/xive: tctx_notify should clear the precluded interrupt Nicholas Piggin
2025-05-14 14:33   ` Caleb Schlossin
2025-05-14 18:58   ` Mike Kowal
2025-05-15 15:46   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 14/50] ppc/xive: Explicitly zero NSR after accepting Nicholas Piggin
2025-05-14 14:34   ` Caleb Schlossin
2025-05-14 19:07   ` Mike Kowal
2025-05-15 23:31     ` Nicholas Piggin
2025-05-15 15:47   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 15/50] ppc/xive: Move NSR decoding into helper functions Nicholas Piggin
2025-05-14 14:35   ` Caleb Schlossin
2025-05-14 19:04   ` Mike Kowal
2025-05-15 15:48   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 16/50] ppc/xive: Fix pulling pool and phys contexts Nicholas Piggin
2025-05-14 14:36   ` Caleb Schlossin
2025-05-14 19:01   ` Mike Kowal
2025-05-15 15:49   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 17/50] pnv/xive2: Support ESB Escalation Nicholas Piggin
2025-05-14 14:36   ` Caleb Schlossin
2025-05-14 19:00   ` Mike Kowal
2025-05-16  0:05   ` Nicholas Piggin
2025-05-16 15:44     ` Miles Glenn
2025-05-12  3:10 ` [PATCH 18/50] pnv/xive2: Print value in invalid register write logging Nicholas Piggin
2025-05-14 14:36   ` Caleb Schlossin
2025-05-14 19:09   ` Mike Kowal
2025-05-15 15:50   ` Miles Glenn
2025-05-16  0:15   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 19/50] pnv/xive2: VC_ENDC_WATCH_SPEC regs should read back WATCH_FULL Nicholas Piggin
2025-05-14 14:37   ` Caleb Schlossin
2025-05-14 19:10   ` Mike Kowal
2025-05-15 15:51   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 20/50] pnv/xive2: Permit valid writes to VC/PC Flush Control registers Nicholas Piggin
2025-05-14 14:37   ` Caleb Schlossin
2025-05-14 19:11   ` Mike Kowal
2025-05-15 15:52   ` Miles Glenn
2025-05-16  0:18   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 21/50] ppc/xive2: add interrupt priority configuration flags Nicholas Piggin
2025-05-14 19:41   ` Mike Kowal
2025-05-16  0:18   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 22/50] ppc/xive2: Support redistribution of group interrupts Nicholas Piggin
2025-05-14 19:42   ` Mike Kowal
2025-05-16  0:19   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 23/50] ppc/xive: Add more interrupt notification tracing Nicholas Piggin
2025-05-14 19:46   ` Mike Kowal
2025-05-16  0:19   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 24/50] ppc/xive2: Improve pool regs variable name Nicholas Piggin
2025-05-14 19:47   ` Mike Kowal
2025-05-16  0:19   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 25/50] ppc/xive2: Implement "Ack OS IRQ to even report line" TIMA op Nicholas Piggin
2025-05-14 19:48   ` Mike Kowal
2025-05-16  0:20   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 26/50] ppc/xive2: Redistribute group interrupt precluded by CPPR update Nicholas Piggin
2025-05-14 19:48   ` Mike Kowal
2025-05-16  0:20   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 27/50] ppc/xive2: redistribute irqs for pool and phys ctx pull Nicholas Piggin
2025-05-14 19:51   ` Mike Kowal
2025-05-12  3:10 ` [PATCH 28/50] ppc/xive: Change presenter .match_nvt to match not present Nicholas Piggin
2025-05-14 19:54   ` Mike Kowal
2025-05-15 23:40     ` Nicholas Piggin
2025-05-15 15:53   ` Miles Glenn [this message]
2025-05-12  3:10 ` [PATCH 29/50] ppc/xive2: Redistribute group interrupt preempted by higher priority interrupt Nicholas Piggin
2025-05-14 19:55   ` Mike Kowal
2025-05-15 15:54   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 30/50] ppc/xive: Add xive_tctx_pipr_present() to present new interrupt Nicholas Piggin
2025-05-14 20:10   ` Mike Kowal
2025-05-15 15:21     ` Mike Kowal
2025-05-15 23:51       ` Nicholas Piggin
2025-05-15 23:43     ` Nicholas Piggin
2025-05-15 15:55   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 31/50] ppc/xive: Fix high prio group interrupt being preempted by low prio VP Nicholas Piggin
2025-05-15 15:21   ` Mike Kowal
2025-05-15 15:55   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 32/50] ppc/xive: Split xive recompute from IPB function Nicholas Piggin
2025-05-14 20:42   ` Mike Kowal
2025-05-15 23:46     ` Nicholas Piggin
2025-05-15 15:56   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 33/50] ppc/xive: tctx signaling registers rework Nicholas Piggin
2025-05-14 20:49   ` Mike Kowal
2025-05-15 15:58   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 34/50] ppc/xive: tctx_accept only lower irq line if an interrupt was presented Nicholas Piggin
2025-05-15 15:16   ` Mike Kowal
2025-05-15 23:50     ` Nicholas Piggin
2025-05-15 16:04   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 35/50] ppc/xive: Add xive_tctx_pipr_set() helper function Nicholas Piggin
2025-05-15 15:18   ` Mike Kowal
2025-05-15 16:05   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 36/50] ppc/xive2: split tctx presentation processing from set CPPR Nicholas Piggin
2025-05-15 15:24   ` Mike Kowal
2025-05-15 16:06   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 37/50] ppc/xive2: Consolidate presentation processing in context push Nicholas Piggin
2025-05-15 15:25   ` Mike Kowal
2025-05-15 16:06   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 38/50] ppc/xive2: Avoid needless interrupt re-check on CPPR set Nicholas Piggin
2025-05-15 15:26   ` Mike Kowal
2025-05-15 16:07   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 39/50] ppc/xive: Assert group interrupts were redistributed Nicholas Piggin
2025-05-15 15:28   ` Mike Kowal
2025-05-15 16:08   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 40/50] ppc/xive2: implement NVP context save restore for POOL ring Nicholas Piggin
2025-05-15 15:36   ` Mike Kowal
2025-05-15 16:09   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 41/50] ppc/xive2: Prevent pulling of pool context losing phys interrupt Nicholas Piggin
2025-05-15 15:43   ` Mike Kowal
2025-05-15 16:10   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 42/50] ppc/xive: Redistribute phys after pulling of pool context Nicholas Piggin
2025-05-15 15:46   ` Mike Kowal
2025-05-15 16:11   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 43/50] ppc/xive: Check TIMA operations validity Nicholas Piggin
2025-05-15 15:47   ` Mike Kowal
2025-05-15 16:12   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 44/50] ppc/xive2: Implement pool context push TIMA op Nicholas Piggin
2025-05-15 15:48   ` Mike Kowal
2025-05-15 16:13   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 45/50] ppc/xive2: redistribute group interrupts on context push Nicholas Piggin
2025-05-15 15:44   ` Mike Kowal
2025-05-15 16:13   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 46/50] ppc/xive2: Implement set_os_pending TIMA op Nicholas Piggin
2025-05-15 15:49   ` Mike Kowal
2025-05-15 16:14   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 47/50] ppc/xive2: Implement POOL LGS push " Nicholas Piggin
2025-05-15 15:50   ` Mike Kowal
2025-05-15 16:15   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 48/50] ppc/xive2: Implement PHYS ring VP " Nicholas Piggin
2025-05-15 15:50   ` Mike Kowal
2025-05-15 16:16   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 49/50] ppc/xive: Split need_resend into restore_nvp Nicholas Piggin
2025-05-15 15:57   ` Mike Kowal
2025-05-15 16:16   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 50/50] ppc/xive2: Enable lower level contexts on VP push Nicholas Piggin
2025-05-15 15:54   ` Mike Kowal
2025-05-15 16:17   ` Miles Glenn
2025-05-15 15:36 ` [PATCH 00/50] ppc/xive: updates for PowerVM Cédric Le Goater
2025-05-16  1:29   ` Nicholas Piggin
2025-07-20 21:26     ` Cédric Le Goater
2025-08-04 17:37       ` Miles Glenn
2025-08-05  5:09         ` Cédric Le Goater
2025-08-05 15:52           ` Miles Glenn
2025-08-05 20:09             ` Cédric Le Goater
2025-07-03  9:37 ` Gautam Menghani

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