From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58294) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8zn1-0000Tp-Cj for qemu-devel@nongnu.org; Thu, 11 May 2017 21:54:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d8zn0-0000eS-I4 for qemu-devel@nongnu.org; Thu, 11 May 2017 21:54:43 -0400 Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= References: <20170510200535.13268-1-f4bug@amsat.org> <20170510200535.13268-4-f4bug@amsat.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <6dc24833-25ed-cc28-d6e5-d49e62bc5941@amsat.org> Date: Thu, 11 May 2017 22:54:33 -0300 MIME-Version: 1.0 In-Reply-To: <20170510200535.13268-4-f4bug@amsat.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH 3/8] target/arm: optimize rev16() using extract op List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, Peter Maydell , Aurelien Jarno , Richard Henderson , qemu-arm@nongnu.org Hi, I'll resend as v3, just to confirm this patch is OK: $ docker run -it -v `pwd`:`pwd` -w `pwd` petersenna/coccinelle --sp-file scripts/coccinelle/tcg_gen_extract.cocci --macro-file scripts/cocci-macro-file.h target/arm/translate-a64.c init_defs_builtins: /usr/lib64/coccinelle/standard.h init_defs: scripts/cocci-macro-file.h HANDLING: target/arm/translate-a64.c candidate at target/arm/translate-a64.c:4041 op_size: i64/i64 (same) low_bits: 16 (value: 0xffff) len: 0xffff len_bits == low_bits candidate IS optimizable candidate at target/arm/translate-a64.c:4047 op_size: i64/i64 (same) low_bits: 16 (value: 0xffff) len: 0xffff len_bits == low_bits candidate IS optimizable On 05/10/2017 05:05 PM, Philippe Mathieu-Daudé wrote: > Applied using Coccinelle script. > > Signed-off-by: Philippe Mathieu-Daudé > --- > target/arm/translate-a64.c | 6 ++---- > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c > index 24de30d92c..7ea130107e 100644 > --- a/target/arm/translate-a64.c > +++ b/target/arm/translate-a64.c > @@ -4038,14 +4038,12 @@ static void handle_rev16(DisasContext *s, unsigned int sf, > tcg_gen_andi_i64(tcg_tmp, tcg_rn, 0xffff); > tcg_gen_bswap16_i64(tcg_rd, tcg_tmp); > > - tcg_gen_shri_i64(tcg_tmp, tcg_rn, 16); > - tcg_gen_andi_i64(tcg_tmp, tcg_tmp, 0xffff); > + tcg_gen_extract_i64(tcg_tmp, tcg_rn, 16, 0xffff); > tcg_gen_bswap16_i64(tcg_tmp, tcg_tmp); > tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, 16, 16); > > if (sf) { > - tcg_gen_shri_i64(tcg_tmp, tcg_rn, 32); > - tcg_gen_andi_i64(tcg_tmp, tcg_tmp, 0xffff); > + tcg_gen_extract_i64(tcg_tmp, tcg_rn, 32, 0xffff); > tcg_gen_bswap16_i64(tcg_tmp, tcg_tmp); > tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, 32, 16); > >