From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-devel@nongnu.org
Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>,
Leon Alrae <leon.alrae@imgtec.com>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [PATCH] target/mips: remove gen_mfc0_load64() and use tcg_gen_ld32s_tl()
Date: Sat, 2 Oct 2021 16:55:02 -0400 [thread overview]
Message-ID: <6dfd4e5d-2d46-4e43-af6a-ba388a9a8a24@linaro.org> (raw)
In-Reply-To: <20211002133753.3432668-1-f4bug@amsat.org>
On 10/2/21 9:37 AM, Philippe Mathieu-Daudé wrote:
> -static inline void gen_mfc0_load64(TCGv arg, target_ulong off)
> -{
> - tcg_gen_ld_tl(arg, cpu_env, off);
> - tcg_gen_ext32s_tl(arg, arg);
> -}
> -
> static inline void gen_mtc0_store32(TCGv arg, target_ulong off)
> {
> TCGv_i32 t0 = tcg_temp_new_i32();
> @@ -5679,17 +5673,19 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
> break;
> case CP0_REG01__YQMASK:
> CP0_CHECK(ctx->insn_flags & ASE_MT);
> - gen_mfc0_load64(arg, offsetof(CPUMIPSState, CP0_YQMask));
> + tcg_gen_ld32s_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_YQMask));
Oh, actually, this replacement only works for little-endian host.
For big-endian host you'd need to adjust the offset by
sizeof(target_ulong) - 4
r~
prev parent reply other threads:[~2021-10-02 20:56 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-02 13:37 [PATCH] target/mips: remove gen_mfc0_load64() and use tcg_gen_ld32s_tl() Philippe Mathieu-Daudé
2021-10-02 18:51 ` Jiaxun Yang
2021-10-02 20:51 ` Richard Henderson
2021-10-02 20:55 ` Richard Henderson [this message]
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