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[67.174.166.185]) by smtp.gmail.com with ESMTPSA id v3sm5096353qkd.20.2021.10.02.13.55.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 02 Oct 2021 13:55:04 -0700 (PDT) Subject: Re: [PATCH] target/mips: remove gen_mfc0_load64() and use tcg_gen_ld32s_tl() To: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , qemu-devel@nongnu.org References: <20211002133753.3432668-1-f4bug@amsat.org> From: Richard Henderson Message-ID: <6dfd4e5d-2d46-4e43-af6a-ba388a9a8a24@linaro.org> Date: Sat, 2 Oct 2021 16:55:02 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20211002133753.3432668-1-f4bug@amsat.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::832; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x832.google.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.413, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , Leon Alrae , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/2/21 9:37 AM, Philippe Mathieu-Daudé wrote: > -static inline void gen_mfc0_load64(TCGv arg, target_ulong off) > -{ > - tcg_gen_ld_tl(arg, cpu_env, off); > - tcg_gen_ext32s_tl(arg, arg); > -} > - > static inline void gen_mtc0_store32(TCGv arg, target_ulong off) > { > TCGv_i32 t0 = tcg_temp_new_i32(); > @@ -5679,17 +5673,19 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) > break; > case CP0_REG01__YQMASK: > CP0_CHECK(ctx->insn_flags & ASE_MT); > - gen_mfc0_load64(arg, offsetof(CPUMIPSState, CP0_YQMask)); > + tcg_gen_ld32s_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_YQMask)); Oh, actually, this replacement only works for little-endian host. For big-endian host you'd need to adjust the offset by sizeof(target_ulong) - 4 r~