* [PATCH v2 0/2] HPPA64-PATCHES-for-8.2 @ 2023-11-17 10:53 deller 2023-11-17 10:53 ` [PATCH v2 1/2] target/hppa: Fix 64-bit SHRPD instruction deller 2023-11-17 10:53 ` [PATCH v2 2/2] disas/hppa: Show hexcode of instruction along with disassembly deller 0 siblings, 2 replies; 7+ messages in thread From: deller @ 2023-11-17 10:53 UTC (permalink / raw) To: qemu-devel, Richard Henderson; +Cc: Helge Deller From: Helge Deller <deller@gmx.de> Two patches which I'd like to get included for 8.2. The SHRPD patch fixes a real translation bug which then allows to boot the 64-bit Linux kernels of the Debian-11 and Debian-12 installation CDs. The second patch adds the instruction byte sequence to the assembly log. This is not an actual bug fix, but it's important since it helps a lot when trying to fix qemu translation bugs on hppa. v2: - corrected "upper" and "lower" in commit SHRPD message Helge Deller (2): target/hppa: Fix 64-bit SHRPD instruction disas/hppa: Show hexcode of instruction along with disassembly disas/hppa.c | 3 +++ target/hppa/translate.c | 4 ++-- 2 files changed, 5 insertions(+), 2 deletions(-) -- 2.41.0 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 1/2] target/hppa: Fix 64-bit SHRPD instruction 2023-11-17 10:53 [PATCH v2 0/2] HPPA64-PATCHES-for-8.2 deller @ 2023-11-17 10:53 ` deller 2023-11-17 16:42 ` Richard Henderson 2023-11-17 10:53 ` [PATCH v2 2/2] disas/hppa: Show hexcode of instruction along with disassembly deller 1 sibling, 1 reply; 7+ messages in thread From: deller @ 2023-11-17 10:53 UTC (permalink / raw) To: qemu-devel, Richard Henderson; +Cc: Helge Deller From: Helge Deller <deller@gmx.de> When shifting the two joined 64-bit registers right, shift the upper 64-bit register to the left and the lower 64-bit register to the right before merging them with OR. Signed-off-by: Helge Deller <deller@gmx.de> --- target/hppa/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 4a4830c3e3..3ef39b1bd7 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -3438,9 +3438,9 @@ static bool trans_shrp_sar(DisasContext *ctx, arg_shrp_sar *a) TCGv_i64 n = tcg_temp_new_i64(); tcg_gen_xori_i64(n, cpu_sar, 63); - tcg_gen_shl_i64(t, src2, n); + tcg_gen_shl_i64(t, src1, n); tcg_gen_shli_i64(t, t, 1); - tcg_gen_shr_i64(dest, src1, cpu_sar); + tcg_gen_shr_i64(dest, src2, cpu_sar); tcg_gen_or_i64(dest, dest, t); } else { TCGv_i64 t = tcg_temp_new_i64(); -- 2.41.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 1/2] target/hppa: Fix 64-bit SHRPD instruction 2023-11-17 10:53 ` [PATCH v2 1/2] target/hppa: Fix 64-bit SHRPD instruction deller @ 2023-11-17 16:42 ` Richard Henderson 0 siblings, 0 replies; 7+ messages in thread From: Richard Henderson @ 2023-11-17 16:42 UTC (permalink / raw) To: deller, qemu-devel; +Cc: Helge Deller On 11/17/23 02:53, deller@kernel.org wrote: > From: Helge Deller <deller@gmx.de> > > When shifting the two joined 64-bit registers right, shift the upper > 64-bit register to the left and the lower 64-bit register to the right > before merging them with OR. > > Signed-off-by: Helge Deller <deller@gmx.de> > --- > target/hppa/translate.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~ ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 2/2] disas/hppa: Show hexcode of instruction along with disassembly 2023-11-17 10:53 [PATCH v2 0/2] HPPA64-PATCHES-for-8.2 deller 2023-11-17 10:53 ` [PATCH v2 1/2] target/hppa: Fix 64-bit SHRPD instruction deller @ 2023-11-17 10:53 ` deller 2023-11-17 16:45 ` Richard Henderson 1 sibling, 1 reply; 7+ messages in thread From: deller @ 2023-11-17 10:53 UTC (permalink / raw) To: qemu-devel, Richard Henderson; +Cc: Helge Deller From: Helge Deller <deller@gmx.de> On hppa many instructions can be expressed by different bytecodes. To be able to debug qemu translation bugs it's therefore necessary to see the currently executed byte codes without the need to lookup the sequence without the full executable. With this patch the instruction byte code is shown beside the disassembly. Signed-off-by: Helge Deller <deller@gmx.de> --- disas/hppa.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/disas/hppa.c b/disas/hppa.c index dcf9a47f34..38fc05acc4 100644 --- a/disas/hppa.c +++ b/disas/hppa.c @@ -1979,6 +1979,9 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info) if (opcode->arch == pa20w) continue; #endif + (*info->fprintf_func) (info->stream, " %02x %02x %02x %02x ", + (insn >> 24) & 0xff, (insn >> 16) & 0xff, + (insn >> 8) & 0xff, insn & 0xff); (*info->fprintf_func) (info->stream, "%s", opcode->name); if (!strchr ("cfCY?-+nHNZFIuv{", opcode->args[0])) -- 2.41.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 2/2] disas/hppa: Show hexcode of instruction along with disassembly 2023-11-17 10:53 ` [PATCH v2 2/2] disas/hppa: Show hexcode of instruction along with disassembly deller @ 2023-11-17 16:45 ` Richard Henderson 2023-11-17 17:33 ` Helge Deller 0 siblings, 1 reply; 7+ messages in thread From: Richard Henderson @ 2023-11-17 16:45 UTC (permalink / raw) To: deller, qemu-devel; +Cc: Helge Deller On 11/17/23 02:53, deller@kernel.org wrote: > From: Helge Deller <deller@gmx.de> > > On hppa many instructions can be expressed by different bytecodes. > To be able to debug qemu translation bugs it's therefore necessary to see the > currently executed byte codes without the need to lookup the sequence without > the full executable. > With this patch the instruction byte code is shown beside the disassembly. > > Signed-off-by: Helge Deller <deller@gmx.de> > --- > disas/hppa.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/disas/hppa.c b/disas/hppa.c > index dcf9a47f34..38fc05acc4 100644 > --- a/disas/hppa.c > +++ b/disas/hppa.c > @@ -1979,6 +1979,9 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info) > if (opcode->arch == pa20w) > continue; > #endif > + (*info->fprintf_func) (info->stream, " %02x %02x %02x %02x ", > + (insn >> 24) & 0xff, (insn >> 16) & 0xff, > + (insn >> 8) & 0xff, insn & 0xff); > (*info->fprintf_func) (info->stream, "%s", opcode->name); > > if (!strchr ("cfCY?-+nHNZFIuv{", opcode->args[0])) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> A possible improvement is to push this outside of the search loop and then change } - (*info->fprintf_func) (info->stream, "#%8x", insn); + info->fprintf_func(info->stream, "<unknown>"); return sizeof (insn); so the byte decode is shared with the rare case of garbage in the insn stream. r~ ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 2/2] disas/hppa: Show hexcode of instruction along with disassembly 2023-11-17 16:45 ` Richard Henderson @ 2023-11-17 17:33 ` Helge Deller 2023-11-17 19:52 ` Richard Henderson 0 siblings, 1 reply; 7+ messages in thread From: Helge Deller @ 2023-11-17 17:33 UTC (permalink / raw) To: Richard Henderson; +Cc: qemu-devel, Helge Deller * Richard Henderson <richard.henderson@linaro.org>: > On 11/17/23 02:53, deller@kernel.org wrote: > > From: Helge Deller <deller@gmx.de> > > > > On hppa many instructions can be expressed by different bytecodes. > > To be able to debug qemu translation bugs it's therefore necessary to see the > > currently executed byte codes without the need to lookup the sequence without > > the full executable. > > With this patch the instruction byte code is shown beside the disassembly. > > > > Signed-off-by: Helge Deller <deller@gmx.de> > > --- > > disas/hppa.c | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/disas/hppa.c b/disas/hppa.c > > index dcf9a47f34..38fc05acc4 100644 > > --- a/disas/hppa.c > > +++ b/disas/hppa.c > > @@ -1979,6 +1979,9 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info) > > if (opcode->arch == pa20w) > > continue; > > #endif > > + (*info->fprintf_func) (info->stream, " %02x %02x %02x %02x ", > > + (insn >> 24) & 0xff, (insn >> 16) & 0xff, > > + (insn >> 8) & 0xff, insn & 0xff); > > (*info->fprintf_func) (info->stream, "%s", opcode->name); > > if (!strchr ("cfCY?-+nHNZFIuv{", opcode->args[0])) > > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > > A possible improvement is to push this outside of the search loop and then change > > } > - (*info->fprintf_func) (info->stream, "#%8x", insn); > + info->fprintf_func(info->stream, "<unknown>"); > return sizeof (insn); > > so the byte decode is shared with the rare case of garbage in the insn stream. Like below? From: Helge Deller <deller@gmx.de> Subject: [PATCH] disas/hppa: Show hexcode of instruction along with disassembly On hppa many instructions can be expressed by different bytecodes. To be able to debug qemu translation bugs it's therefore necessary to see the currently executed byte codes without the need to lookup the sequence without the full executable. With this patch the instruction byte code is shown beside the disassembly. Signed-off-by: Helge Deller <deller@gmx.de> diff --git a/disas/hppa.c b/disas/hppa.c index dcf9a47f34..cce4f4aa37 100644 --- a/disas/hppa.c +++ b/disas/hppa.c @@ -1968,6 +1968,10 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info) insn = bfd_getb32 (buffer); + info->fprintf_func(info->stream, " %02x %02x %02x %02x ", + (insn >> 24) & 0xff, (insn >> 16) & 0xff, + (insn >> 8) & 0xff, insn & 0xff); + for (i = 0; i < NUMOPCODES; ++i) { const struct pa_opcode *opcode = &pa_opcodes[i]; @@ -2826,6 +2830,6 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info) return sizeof (insn); } } - (*info->fprintf_func) (info->stream, "#%8x", insn); + info->fprintf_func(info->stream, "<unknown>"); return sizeof (insn); } ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 2/2] disas/hppa: Show hexcode of instruction along with disassembly 2023-11-17 17:33 ` Helge Deller @ 2023-11-17 19:52 ` Richard Henderson 0 siblings, 0 replies; 7+ messages in thread From: Richard Henderson @ 2023-11-17 19:52 UTC (permalink / raw) To: Helge Deller; +Cc: qemu-devel On 11/17/23 09:33, Helge Deller wrote: > * Richard Henderson <richard.henderson@linaro.org>: >> On 11/17/23 02:53, deller@kernel.org wrote: >>> From: Helge Deller <deller@gmx.de> >>> >>> On hppa many instructions can be expressed by different bytecodes. >>> To be able to debug qemu translation bugs it's therefore necessary to see the >>> currently executed byte codes without the need to lookup the sequence without >>> the full executable. >>> With this patch the instruction byte code is shown beside the disassembly. >>> >>> Signed-off-by: Helge Deller <deller@gmx.de> >>> --- >>> disas/hppa.c | 3 +++ >>> 1 file changed, 3 insertions(+) >>> >>> diff --git a/disas/hppa.c b/disas/hppa.c >>> index dcf9a47f34..38fc05acc4 100644 >>> --- a/disas/hppa.c >>> +++ b/disas/hppa.c >>> @@ -1979,6 +1979,9 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info) >>> if (opcode->arch == pa20w) >>> continue; >>> #endif >>> + (*info->fprintf_func) (info->stream, " %02x %02x %02x %02x ", >>> + (insn >> 24) & 0xff, (insn >> 16) & 0xff, >>> + (insn >> 8) & 0xff, insn & 0xff); >>> (*info->fprintf_func) (info->stream, "%s", opcode->name); >>> if (!strchr ("cfCY?-+nHNZFIuv{", opcode->args[0])) >> >> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> >> >> A possible improvement is to push this outside of the search loop and then change >> >> } >> - (*info->fprintf_func) (info->stream, "#%8x", insn); >> + info->fprintf_func(info->stream, "<unknown>"); >> return sizeof (insn); >> >> so the byte decode is shared with the rare case of garbage in the insn stream. > > Like below? Yes, perfect, thanks. r~ > > From: Helge Deller <deller@gmx.de> > Subject: [PATCH] disas/hppa: Show hexcode of instruction along with > disassembly > > On hppa many instructions can be expressed by different bytecodes. > To be able to debug qemu translation bugs it's therefore necessary to see the > currently executed byte codes without the need to lookup the sequence without > the full executable. > With this patch the instruction byte code is shown beside the disassembly. > > Signed-off-by: Helge Deller <deller@gmx.de> > > diff --git a/disas/hppa.c b/disas/hppa.c > index dcf9a47f34..cce4f4aa37 100644 > --- a/disas/hppa.c > +++ b/disas/hppa.c > @@ -1968,6 +1968,10 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info) > > insn = bfd_getb32 (buffer); > > + info->fprintf_func(info->stream, " %02x %02x %02x %02x ", > + (insn >> 24) & 0xff, (insn >> 16) & 0xff, > + (insn >> 8) & 0xff, insn & 0xff); > + > for (i = 0; i < NUMOPCODES; ++i) > { > const struct pa_opcode *opcode = &pa_opcodes[i]; > @@ -2826,6 +2830,6 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info) > return sizeof (insn); > } > } > - (*info->fprintf_func) (info->stream, "#%8x", insn); > + info->fprintf_func(info->stream, "<unknown>"); > return sizeof (insn); > } ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-11-17 19:53 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-11-17 10:53 [PATCH v2 0/2] HPPA64-PATCHES-for-8.2 deller 2023-11-17 10:53 ` [PATCH v2 1/2] target/hppa: Fix 64-bit SHRPD instruction deller 2023-11-17 16:42 ` Richard Henderson 2023-11-17 10:53 ` [PATCH v2 2/2] disas/hppa: Show hexcode of instruction along with disassembly deller 2023-11-17 16:45 ` Richard Henderson 2023-11-17 17:33 ` Helge Deller 2023-11-17 19:52 ` Richard Henderson
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