* [Qemu-devel] [PATCH v2 3/4] util/cacheinfo.c: Use uintptr_t instead of unsigned long in AArch64 arch_cache_info()
@ 2019-04-30 18:13 Cao Jiaxi
2019-04-30 18:13 ` Cao Jiaxi
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Cao Jiaxi @ 2019-04-30 18:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Cao Jiaxi
Windows ARM64 uses LLP64 model, which breaks current assumptions.
Signed-off-by: Cao Jiaxi <driver1998@foxmail.com>
---
util/cacheinfo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/util/cacheinfo.c b/util/cacheinfo.c
index 3cd080b83d..ce6f0dbf6a 100644
--- a/util/cacheinfo.c
+++ b/util/cacheinfo.c
@@ -107,7 +107,7 @@ static void sys_cache_info(int *isize, int *dsize)
static void arch_cache_info(int *isize, int *dsize)
{
if (*isize == 0 || *dsize == 0) {
- unsigned long ctr;
+ uintptr_t ctr;
/* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1,
but (at least under Linux) these are marked protected by the
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [Qemu-devel] [PATCH v2 3/4] util/cacheinfo.c: Use uintptr_t instead of unsigned long in AArch64 arch_cache_info()
2019-04-30 18:13 [Qemu-devel] [PATCH v2 3/4] util/cacheinfo.c: Use uintptr_t instead of unsigned long in AArch64 arch_cache_info() Cao Jiaxi
@ 2019-04-30 18:13 ` Cao Jiaxi
2019-04-30 19:12 ` Philippe Mathieu-Daudé
2019-05-02 8:26 ` Thomas Huth
2 siblings, 0 replies; 10+ messages in thread
From: Cao Jiaxi @ 2019-04-30 18:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Cao Jiaxi
Windows ARM64 uses LLP64 model, which breaks current assumptions.
Signed-off-by: Cao Jiaxi <driver1998@foxmail.com>
---
util/cacheinfo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/util/cacheinfo.c b/util/cacheinfo.c
index 3cd080b83d..ce6f0dbf6a 100644
--- a/util/cacheinfo.c
+++ b/util/cacheinfo.c
@@ -107,7 +107,7 @@ static void sys_cache_info(int *isize, int *dsize)
static void arch_cache_info(int *isize, int *dsize)
{
if (*isize == 0 || *dsize == 0) {
- unsigned long ctr;
+ uintptr_t ctr;
/* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1,
but (at least under Linux) these are marked protected by the
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [Qemu-devel] [PATCH v2 3/4] util/cacheinfo.c: Use uintptr_t instead of unsigned long in AArch64 arch_cache_info()
2019-04-30 18:13 [Qemu-devel] [PATCH v2 3/4] util/cacheinfo.c: Use uintptr_t instead of unsigned long in AArch64 arch_cache_info() Cao Jiaxi
2019-04-30 18:13 ` Cao Jiaxi
@ 2019-04-30 19:12 ` Philippe Mathieu-Daudé
2019-04-30 19:12 ` Philippe Mathieu-Daudé
2019-05-01 15:35 ` Philippe Mathieu-Daudé
2019-05-02 8:26 ` Thomas Huth
2 siblings, 2 replies; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-04-30 19:12 UTC (permalink / raw)
To: Cao Jiaxi, qemu-devel, qemu-arm
On 4/30/19 8:13 PM, Cao Jiaxi wrote:
> Windows ARM64 uses LLP64 model, which breaks current assumptions.
>
> Signed-off-by: Cao Jiaxi <driver1998@foxmail.com>
> ---
> util/cacheinfo.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/util/cacheinfo.c b/util/cacheinfo.c
> index 3cd080b83d..ce6f0dbf6a 100644
> --- a/util/cacheinfo.c
> +++ b/util/cacheinfo.c
> @@ -107,7 +107,7 @@ static void sys_cache_info(int *isize, int *dsize)
> static void arch_cache_info(int *isize, int *dsize)
> {
> if (*isize == 0 || *dsize == 0) {
> - unsigned long ctr;
> + uintptr_t ctr;
>
> /* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1,
> but (at least under Linux) these are marked protected by the
>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [Qemu-devel] [PATCH v2 3/4] util/cacheinfo.c: Use uintptr_t instead of unsigned long in AArch64 arch_cache_info()
2019-04-30 19:12 ` Philippe Mathieu-Daudé
@ 2019-04-30 19:12 ` Philippe Mathieu-Daudé
2019-05-01 15:35 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-04-30 19:12 UTC (permalink / raw)
To: Cao Jiaxi, qemu-devel, qemu-arm
On 4/30/19 8:13 PM, Cao Jiaxi wrote:
> Windows ARM64 uses LLP64 model, which breaks current assumptions.
>
> Signed-off-by: Cao Jiaxi <driver1998@foxmail.com>
> ---
> util/cacheinfo.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/util/cacheinfo.c b/util/cacheinfo.c
> index 3cd080b83d..ce6f0dbf6a 100644
> --- a/util/cacheinfo.c
> +++ b/util/cacheinfo.c
> @@ -107,7 +107,7 @@ static void sys_cache_info(int *isize, int *dsize)
> static void arch_cache_info(int *isize, int *dsize)
> {
> if (*isize == 0 || *dsize == 0) {
> - unsigned long ctr;
> + uintptr_t ctr;
>
> /* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1,
> but (at least under Linux) these are marked protected by the
>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [Qemu-devel] [PATCH v2 3/4] util/cacheinfo.c: Use uintptr_t instead of unsigned long in AArch64 arch_cache_info()
2019-04-30 19:12 ` Philippe Mathieu-Daudé
2019-04-30 19:12 ` Philippe Mathieu-Daudé
@ 2019-05-01 15:35 ` Philippe Mathieu-Daudé
2019-05-01 15:35 ` Philippe Mathieu-Daudé
1 sibling, 1 reply; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-05-01 15:35 UTC (permalink / raw)
To: Cao Jiaxi, qemu-devel, qemu-arm
On 4/30/19 9:12 PM, Philippe Mathieu-Daudé wrote:
> On 4/30/19 8:13 PM, Cao Jiaxi wrote:
>> Windows ARM64 uses LLP64 model, which breaks current assumptions.
>>
>> Signed-off-by: Cao Jiaxi <driver1998@foxmail.com>
>> ---
>> util/cacheinfo.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/util/cacheinfo.c b/util/cacheinfo.c
>> index 3cd080b83d..ce6f0dbf6a 100644
>> --- a/util/cacheinfo.c
>> +++ b/util/cacheinfo.c
>> @@ -107,7 +107,7 @@ static void sys_cache_info(int *isize, int *dsize)
>> static void arch_cache_info(int *isize, int *dsize)
>> {
>> if (*isize == 0 || *dsize == 0) {
>> - unsigned long ctr;
>> + uintptr_t ctr;
>>
>> /* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1,
>> but (at least under Linux) these are marked protected by the
>>
>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>
Maybe you can use a shorter commit subject, such "util/cacheinfo: Use
uintptr_t on LLP64 model to satisfy Windows ARM64" (or better), so it
won't be cut in git log (limited to 72 chars).
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [Qemu-devel] [PATCH v2 3/4] util/cacheinfo.c: Use uintptr_t instead of unsigned long in AArch64 arch_cache_info()
2019-05-01 15:35 ` Philippe Mathieu-Daudé
@ 2019-05-01 15:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-05-01 15:35 UTC (permalink / raw)
To: Cao Jiaxi, qemu-devel, qemu-arm
On 4/30/19 9:12 PM, Philippe Mathieu-Daudé wrote:
> On 4/30/19 8:13 PM, Cao Jiaxi wrote:
>> Windows ARM64 uses LLP64 model, which breaks current assumptions.
>>
>> Signed-off-by: Cao Jiaxi <driver1998@foxmail.com>
>> ---
>> util/cacheinfo.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/util/cacheinfo.c b/util/cacheinfo.c
>> index 3cd080b83d..ce6f0dbf6a 100644
>> --- a/util/cacheinfo.c
>> +++ b/util/cacheinfo.c
>> @@ -107,7 +107,7 @@ static void sys_cache_info(int *isize, int *dsize)
>> static void arch_cache_info(int *isize, int *dsize)
>> {
>> if (*isize == 0 || *dsize == 0) {
>> - unsigned long ctr;
>> + uintptr_t ctr;
>>
>> /* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1,
>> but (at least under Linux) these are marked protected by the
>>
>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>
Maybe you can use a shorter commit subject, such "util/cacheinfo: Use
uintptr_t on LLP64 model to satisfy Windows ARM64" (or better), so it
won't be cut in git log (limited to 72 chars).
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Qemu-devel] [PATCH v2 3/4] util/cacheinfo.c: Use uintptr_t instead of unsigned long in AArch64 arch_cache_info()
2019-04-30 18:13 [Qemu-devel] [PATCH v2 3/4] util/cacheinfo.c: Use uintptr_t instead of unsigned long in AArch64 arch_cache_info() Cao Jiaxi
2019-04-30 18:13 ` Cao Jiaxi
2019-04-30 19:12 ` Philippe Mathieu-Daudé
@ 2019-05-02 8:26 ` Thomas Huth
2019-05-02 8:26 ` Thomas Huth
2019-05-02 16:31 ` Richard Henderson
2 siblings, 2 replies; 10+ messages in thread
From: Thomas Huth @ 2019-05-02 8:26 UTC (permalink / raw)
To: Cao Jiaxi, qemu-devel
On 30/04/2019 20.13, Cao Jiaxi wrote:
> Windows ARM64 uses LLP64 model, which breaks current assumptions.
>
> Signed-off-by: Cao Jiaxi <driver1998@foxmail.com>
> ---
> util/cacheinfo.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/util/cacheinfo.c b/util/cacheinfo.c
> index 3cd080b83d..ce6f0dbf6a 100644
> --- a/util/cacheinfo.c
> +++ b/util/cacheinfo.c
> @@ -107,7 +107,7 @@ static void sys_cache_info(int *isize, int *dsize)
> static void arch_cache_info(int *isize, int *dsize)
> {
> if (*isize == 0 || *dsize == 0) {
> - unsigned long ctr;
> + uintptr_t ctr;
Looking at the whole function, is uintptr_t really the right type to use
here? ctr does not seem to contain the value of a pointer variable, so
this looks wrong to me...
Do you get a compiler warning here? If so, how does it look like?
Anyway, I think it would be better to use a uint64_t or uint32_t type
here instead if possible?
Thomas
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [Qemu-devel] [PATCH v2 3/4] util/cacheinfo.c: Use uintptr_t instead of unsigned long in AArch64 arch_cache_info()
2019-05-02 8:26 ` Thomas Huth
@ 2019-05-02 8:26 ` Thomas Huth
2019-05-02 16:31 ` Richard Henderson
1 sibling, 0 replies; 10+ messages in thread
From: Thomas Huth @ 2019-05-02 8:26 UTC (permalink / raw)
To: Cao Jiaxi, qemu-devel
On 30/04/2019 20.13, Cao Jiaxi wrote:
> Windows ARM64 uses LLP64 model, which breaks current assumptions.
>
> Signed-off-by: Cao Jiaxi <driver1998@foxmail.com>
> ---
> util/cacheinfo.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/util/cacheinfo.c b/util/cacheinfo.c
> index 3cd080b83d..ce6f0dbf6a 100644
> --- a/util/cacheinfo.c
> +++ b/util/cacheinfo.c
> @@ -107,7 +107,7 @@ static void sys_cache_info(int *isize, int *dsize)
> static void arch_cache_info(int *isize, int *dsize)
> {
> if (*isize == 0 || *dsize == 0) {
> - unsigned long ctr;
> + uintptr_t ctr;
Looking at the whole function, is uintptr_t really the right type to use
here? ctr does not seem to contain the value of a pointer variable, so
this looks wrong to me...
Do you get a compiler warning here? If so, how does it look like?
Anyway, I think it would be better to use a uint64_t or uint32_t type
here instead if possible?
Thomas
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [Qemu-devel] [PATCH v2 3/4] util/cacheinfo.c: Use uintptr_t instead of unsigned long in AArch64 arch_cache_info()
2019-05-02 8:26 ` Thomas Huth
2019-05-02 8:26 ` Thomas Huth
@ 2019-05-02 16:31 ` Richard Henderson
2019-05-02 16:31 ` Richard Henderson
1 sibling, 1 reply; 10+ messages in thread
From: Richard Henderson @ 2019-05-02 16:31 UTC (permalink / raw)
To: Thomas Huth, Cao Jiaxi, qemu-devel
On 5/2/19 1:26 AM, Thomas Huth wrote:
>> @@ -107,7 +107,7 @@ static void sys_cache_info(int *isize, int *dsize)
>> static void arch_cache_info(int *isize, int *dsize)
>> {
>> if (*isize == 0 || *dsize == 0) {
>> - unsigned long ctr;
>> + uintptr_t ctr;
>
> Looking at the whole function, is uintptr_t really the right type to use
> here? ctr does not seem to contain the value of a pointer variable, so
> this looks wrong to me...
> Do you get a compiler warning here? If so, how does it look like?
> Anyway, I think it would be better to use a uint64_t or uint32_t type
> here instead if possible?
uint64_t is the proper type to use with MRS.
r~
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [Qemu-devel] [PATCH v2 3/4] util/cacheinfo.c: Use uintptr_t instead of unsigned long in AArch64 arch_cache_info()
2019-05-02 16:31 ` Richard Henderson
@ 2019-05-02 16:31 ` Richard Henderson
0 siblings, 0 replies; 10+ messages in thread
From: Richard Henderson @ 2019-05-02 16:31 UTC (permalink / raw)
To: Thomas Huth, Cao Jiaxi, qemu-devel
On 5/2/19 1:26 AM, Thomas Huth wrote:
>> @@ -107,7 +107,7 @@ static void sys_cache_info(int *isize, int *dsize)
>> static void arch_cache_info(int *isize, int *dsize)
>> {
>> if (*isize == 0 || *dsize == 0) {
>> - unsigned long ctr;
>> + uintptr_t ctr;
>
> Looking at the whole function, is uintptr_t really the right type to use
> here? ctr does not seem to contain the value of a pointer variable, so
> this looks wrong to me...
> Do you get a compiler warning here? If so, how does it look like?
> Anyway, I think it would be better to use a uint64_t or uint32_t type
> here instead if possible?
uint64_t is the proper type to use with MRS.
r~
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2019-05-02 16:32 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
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2019-04-30 18:13 [Qemu-devel] [PATCH v2 3/4] util/cacheinfo.c: Use uintptr_t instead of unsigned long in AArch64 arch_cache_info() Cao Jiaxi
2019-04-30 18:13 ` Cao Jiaxi
2019-04-30 19:12 ` Philippe Mathieu-Daudé
2019-04-30 19:12 ` Philippe Mathieu-Daudé
2019-05-01 15:35 ` Philippe Mathieu-Daudé
2019-05-01 15:35 ` Philippe Mathieu-Daudé
2019-05-02 8:26 ` Thomas Huth
2019-05-02 8:26 ` Thomas Huth
2019-05-02 16:31 ` Richard Henderson
2019-05-02 16:31 ` Richard Henderson
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