Re: [PATCH V4 4/4] tests: Add test for ASID2 and write/read of feature bits

[Gustavo Romero <gustavo.romero@linaro.org>]

Hi Jim,

On 12/2/25 09:00, Jim MacArthur wrote:
> Test for presence of ASID2; if it is, check FNG1, FNG0, and A2 are
> writable, and read value shows the update. If not present, check these
> read as RES0.
> 
> Signed-off-by: Jim MacArthur <jim.macarthur@linaro.org>
> ---
>   tests/tcg/aarch64/system/asid2.c | 75 ++++++++++++++++++++++++++++++++
>   1 file changed, 75 insertions(+)
>   create mode 100644 tests/tcg/aarch64/system/asid2.c
> 
> diff --git a/tests/tcg/aarch64/system/asid2.c b/tests/tcg/aarch64/system/asid2.c
> new file mode 100644
> index 0000000000..a4887e4ce2
> --- /dev/null
> +++ b/tests/tcg/aarch64/system/asid2.c
> @@ -0,0 +1,75 @@
> +/*
> + * ASID2 Feature presence and enabled TCR2_EL1 bits test
> + *
> + * Copyright (c) 2025 Linaro Ltd
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later

The SPDX tag must go in the first line, except in script sources, where it goes
after the shebang line.


+ */
> +
> +#include <stdint.h>
> +#include <minilib.h>
> +
> +#define ID_AA64MMFR3_EL1 "S3_0_C0_C7_3"
> +#define ID_AA64MMFR4_EL1 "S3_0_C0_C7_4"
> +#define TCR2_EL1 "S3_0_C2_C0_3"
> +
> +int main()
> +{
> +    /*
> +     * Test for presence of ASID2 and three feature bits enabled by it:
> +     * https://developer.arm.com/documentation/109697/2025_09/Feature-descriptions/The-Armv9-5-architecture-extension
> +     * Bits added are FNG1, FNG0, and A2. These should be RES0 if A2 is
> +     * not enabled and read as the written value if A2 is enabled.
> +     */
> +
> +    uint64_t out;
> +    uint64_t idreg3;
> +    uint64_t idreg4;
> +    int tcr2_present;
> +    int asid2_present;
> +
> +    /* Mask is FNG1, FNG0, and A2 */
> +    const uint64_t feature_mask = (1ULL << 18 | 1ULL << 17 | 1ULL << 16);
> +    const uint64_t in = feature_mask;
> +
> +    asm("mrs %[x1], " ID_AA64MMFR3_EL1 "\n\t"
> +        : [x1] "=r" (idreg3));

You can use the same name for the asm label as the one used for the C variable to
ease even further reading the code, so it's ok to do:

asm("mrs %[idreg3], " ID_AA64MMFR3_EL1 "\n\t"
      : [idreg3] "=r" (idreg3));


Likewise for all the other uses of asm() below.

Otherwise the test LGTM.


Cheers,
Gustavo

> +    tcr2_present = ((idreg3 & 0xF) != 0);
> +
> +    if (!tcr2_present) {
> +        ml_printf("TCR2 is not present, cannot perform test");
> +        return 0;
> +    }
> +
> +    asm("mrs %[x1], " ID_AA64MMFR4_EL1 "\n\t"
> +        : [x1] "=r" (idreg4));
> +
> +    asid2_present = ((idreg4 & 0xF00) != 0);
> +
> +    asm("msr " TCR2_EL1 ", %[x0]\n\t"
> +        "mrs %[x1], " TCR2_EL1 "\n\t"
> +        : [x1] "=r" (out)
> +        : [x0] "r" (in));
> +
> +    if (asid2_present) {
> +        if ((out & feature_mask) == in) {
> +            ml_printf("OK\n");
> +            return 0;
> +        } else {
> +            ml_printf("FAIL: ASID2 present, but read value %lx != "
> +                      "written value %lx\n",
> +                      out & feature_mask, in);
> +            return 1;
> +        }
> +    } else {
> +        if (out == 0) {
> +            ml_printf("TCR2_EL1 reads as RES0 as expected\n");
> +            return 0;
> +        } else {
> +            ml_printf("FAIL: ASID2, missing but read value %lx != 0\n",
> +                      out & feature_mask, in);
> +            return 1;
> +        }
> +    }
> +}