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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-429952b7b22sm20538061f8f.9.2025.10.28.07.47.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Oct 2025 07:47:01 -0700 (PDT) Message-ID: <6e9d8822-36bf-457f-98f1-fe0734d78dcb@redhat.com> Date: Tue, 28 Oct 2025 15:46:59 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 22/27] hw/arm/smmuv3-accel: Add support for ATS Content-Language: en-US To: Shameer Kolothum , Jason Gunthorpe Cc: Nicolin Chen , "qemu-arm@nongnu.org" , "qemu-devel@nongnu.org" , "peter.maydell@linaro.org" , "ddutile@redhat.com" , "berrange@redhat.com" , Nathan Chen , Matt Ochs , "smostafa@google.com" , "wangzhou1@hisilicon.com" , "jiangkunkun@huawei.com" , "jonathan.cameron@huawei.com" , "zhangfei.gao@linaro.org" , "zhenzhong.duan@intel.com" , "yi.l.liu@intel.com" , "shameerkolothum@gmail.com" References: <20250929133643.38961-1-skolothumtho@nvidia.com> <20250929133643.38961-23-skolothumtho@nvidia.com> <26f4d9b2-75be-4913-bb60-01e647a7ec83@redhat.com> <25d22f06-69e2-4954-9bd9-f73f899fc114@redhat.com> <20251028121625.GF1018328@nvidia.com> <9748e922-057b-4e7c-ad6b-b83f5591290a@redhat.com> <20251028134148.GH1018328@nvidia.com> <15e0d683-e524-44ed-b253-c6221585d9bd@redhat.com> <20251028140340.GI1018328@nvidia.com> From: Eric Auger In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 10/28/25 3:44 PM, Shameer Kolothum wrote: > >> -----Original Message----- >> From: Jason Gunthorpe >> Sent: 28 October 2025 14:04 >> To: Eric Auger >> Cc: Nicolin Chen ; Shameer Kolothum >> ; qemu-arm@nongnu.org; qemu- >> devel@nongnu.org; peter.maydell@linaro.org; ddutile@redhat.com; >> berrange@redhat.com; Nathan Chen ; Matt Ochs >> ; smostafa@google.com; wangzhou1@hisilicon.com; >> jiangkunkun@huawei.com; jonathan.cameron@huawei.com; >> zhangfei.gao@linaro.org; zhenzhong.duan@intel.com; yi.l.liu@intel.com; >> shameerkolothum@gmail.com >> Subject: Re: [PATCH v4 22/27] hw/arm/smmuv3-accel: Add support for ATS >> >> On Tue, Oct 28, 2025 at 02:51:29PM +0100, Eric Auger wrote: >>> >>> On 10/28/25 2:41 PM, Jason Gunthorpe wrote: >>>> On Tue, Oct 28, 2025 at 02:21:32PM +0100, Eric Auger wrote: >>>>> On 10/28/25 1:16 PM, Jason Gunthorpe wrote: >>>>>> On Mon, Oct 27, 2025 at 10:53:10AM -0700, Nicolin Chen wrote: >>>>>> >>>>>>> Hmm, that sounds a legit reason, though adding the ATS support to >>>>>>> the emulated SMMUv3 isn't seemingly a small effort... >>>>>> What is "emulated ATS" anyhow? >>>>> I guess it means implementing ATS translation requests and capability to >>>>> send ATS invalidations. something like: >>>>> >>>>> >> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore. >> kernel.org%2Fall%2F20250628180226.133285-1-clement.mathieu-- >> drif%40eviden.com%2F&data=05%7C02%7Cskolothumtho%40nvidia.com% >> 7C9f9c8fc639214f54ca0808de162accab%7C43083d15727340c1b7db39efd >> 9ccc17a%7C0%7C0%7C638972570246014005%7CUnknown%7CTWFpbGZs >> b3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIs >> IkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=YQfzKiIcBbKj >> kIauHU8ELDk15jclFnFcevMMRf7LHF0%3D&reserved=0 >>>> Why would you even want this? The cover letter didn't explain what the >>>> point was. >>> well I am just concerned about exposing ATS support to emulated EPs >>> while we actually do not support it. >> Sure, that shouldn't be done. There is ACPI/DT tables indicating if the >> each device supports ATS and qemu should not be marking the emulated >> EPs as ATS capable in the first place.. >> >> However, there is no big work with showing EPs as ATS capable. They >> don't implement an ATC and there is no concept of "translated address" >> inside qemu so the only requirement to make it "work" is to just NOP >> the ATC invalidation SMMU commands for those EPs. > The only case where an emulated endpoint can appear with SMMUv3 > accel enabled is during a hot-plug scenario. > > As mentioned elsewhere in this discussion, that can be handled by propagating > an error from the pci_device_iommu_address_space() path. > > I will take a look at that if this is the main concern regarding ATS. OK thanks! Eric > > Thanks, > Shameer >