From: Richard Henderson <richard.henderson@linaro.org>
To: Rebecca Cran <rebecca@nuviainc.com>,
Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH v3 1/3] target/arm: Add support for FEAT_TLBIRANGE
Date: Mon, 15 Mar 2021 12:42:34 -0600 [thread overview]
Message-ID: <6edef34b-215c-6c18-1400-16dea21f4555@linaro.org> (raw)
In-Reply-To: <a1fff12e-eef3-f742-be40-3eee395972e7@nuviainc.com>
On 3/15/21 12:34 PM, Rebecca Cran wrote:
> On 3/10/21 12:24 PM, Richard Henderson wrote:
>> On 3/9/21 6:29 PM, Rebecca Cran wrote:
>>> +void tlb_flush_page_range_by_mmuidx(CPUState *cpu, target_ulong addr,
>>> + unsigned int num_pages, uint16_t idxmap)
>>
>> I am not keen on this interface. I think you should take either start+end
>> addresses (inclusive) or start+length (in bytes).
>>
>> Using num_pages, and as an unsigned int, seems too easy to fail when applied
>> to a different guest.
>
> Do you mean pushing the knowledge of the number of pages to invalidate down to
> cputlb.c?
Yes.
In particular, your interface does not allow a single call to invalidate 1/2 of
the total address space. Because the type for num_pages isn't large enough.
There's nothing else in the cputlb interface that is page-based, except for
"flush one page", and I thought that either
target_ulong addr, target_ulong length, unsigned bits
would be a clearer interface to use.
> Because I'm thinking there has to be a loop somewhere that
> invalidates each page if a full flush isn't being done?
Certainly.
r~
next prev parent reply other threads:[~2021-03-15 19:01 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-10 0:29 [PATCH v3 0/3] target/arm: Add support for FEAT_TLBIOS and FEAT_TLBIRANGE Rebecca Cran
2021-03-10 0:29 ` [PATCH v3 1/3] target/arm: Add support for FEAT_TLBIRANGE Rebecca Cran
2021-03-10 19:24 ` Richard Henderson
2021-03-10 21:59 ` Rebecca Cran
2021-03-15 18:34 ` Rebecca Cran
2021-03-15 18:42 ` Richard Henderson [this message]
2021-03-16 6:20 ` Rebecca Cran
2021-03-16 15:09 ` Richard Henderson
2021-03-16 15:51 ` Rebecca Cran
2021-03-10 0:29 ` [PATCH v3 2/3] target/arm: Add support for FEAT_TLBIOS Rebecca Cran
2021-03-10 19:32 ` Richard Henderson
2021-03-10 0:29 ` [PATCH v3 3/3] target/arm: set ID_AA64ISAR0.TLB to 2 for max AARCH64 CPU type Rebecca Cran
2021-03-10 19:34 ` Richard Henderson
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