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From: "Cédric Le Goater" <clg@kaod.org>
To: Nicholas Piggin <npiggin@gmail.com>, qemu-ppc@nongnu.org
Cc: "Caleb Schlossin" <calebs@linux.vnet.ibm.com>,
	"Frédéric Barrat" <fbarrat@linux.ibm.com>,
	"Daniel Henrique Barboza" <danielhb413@gmail.com>,
	qemu-devel@nongnu.org
Subject: Re: [RFC PATCH 00/10] ppc/pnv: Better big-core model, lpar-per-core,  PC unit
Date: Mon, 27 May 2024 09:36:33 +0200	[thread overview]
Message-ID: <6ef44e57-14b4-4498-b51b-7c486582c5ca@kaod.org> (raw)
In-Reply-To: <D1K935B9TYYV.3GMTXCVHSWP0G@gmail.com>

On 5/27/24 09:32, Nicholas Piggin wrote:
> On Mon May 27, 2024 at 4:25 PM AEST, Cédric Le Goater wrote:
>> On 5/26/24 14:26, Nicholas Piggin wrote:
>>> Primary motivation for this series is to improve big-core support.
>>> Other things like SPR indirect, timebase state, PC xscom, are required
>>> for minimal big core support.
>>>
>>> I'm still not 100% happy with the big-core topology model after this.
>>> Maybe one day we add pnv big core and pnv small core structures. But
>>
>> I haven't look at the proposal yet, but indeed, we could introduce
>> a new TYPE_PNV_CORE type for big cores only.
> 
> Yeah. It's still tricky because big-core structure contains the CPUs
> if you are running in small core mode. So it would really have to be
> a PnvCPUCore and PnvPervasiveCore or something, where the former is
> either SMT4 and 1:1 with the latter or SMT8 and 1:2 depending on mode.
> 
> And some of the "CPU" type operations in big core mode still need to
> operate on the small core.
> 
> For now, the accessors and helpers seem to be not too bad.
> 
>>> nothing is completely clean because big core mode still has certain
>>> small core restrictions. I think for now we take a bit of mostly
>>> abstracted ugliness in TCG code for the benefit of not spreading
>>> hacks through pervasive (xscom) core addressing.
>>>
>>> After this series, power9 and power10 get through skiboot/Linux boot
>> s
>>
>> Have you tried SMT8 on powernv8 ? I remember seeing a hang if I am correct.
>> I don't think POWER8 deserves much attention anymore, we could deprecate
>> POWER8E and POWER8NVL. However, we should at least report an error if we
>> know a setup is broken.
> 
> Yeah it does have some problem. Maybe should just disable SMT unless
> someone finds time to work it out.


The new _init routines would be a good place to do that.

Thanks,

C.


> 
> Thanks,
> Nick



      reply	other threads:[~2024-05-27  7:37 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-26 12:26 [RFC PATCH 00/10] ppc/pnv: Better big-core model, lpar-per-core, PC unit Nicholas Piggin
2024-05-26 12:26 ` [RFC PATCH 01/10] ppc/pnv: Add pointer from PnvCPUState to PnvCore Nicholas Piggin
2024-05-27 15:23   ` Cédric Le Goater
2024-05-28  6:19   ` Harsh Prateek Bora
2024-05-26 12:26 ` [RFC PATCH 02/10] ppc/pnv: Move timebase state into PnvCore Nicholas Piggin
2024-05-28  6:28   ` Harsh Prateek Bora
2024-05-28  7:52     ` Cédric Le Goater
2024-05-29  0:19       ` Nicholas Piggin
2024-05-26 12:26 ` [RFC PATCH 03/10] target/ppc: Improve SPR indirect registers Nicholas Piggin
2024-05-28  6:50   ` Harsh Prateek Bora
2024-05-29  0:13     ` Nicholas Piggin
2024-05-26 12:26 ` [RFC PATCH 04/10] ppc/pnv: specialise init for powernv8/9/10 machines Nicholas Piggin
2024-05-28  7:10   ` Harsh Prateek Bora
2024-05-28  7:45     ` Cédric Le Goater
2024-05-29  0:18       ` Nicholas Piggin
2024-05-26 12:26 ` [RFC PATCH 05/10] ppc/pnv: Extend chip_pir class method to TIR as well Nicholas Piggin
2024-05-28  8:32   ` Harsh Prateek Bora
2024-05-29  0:24     ` Nicholas Piggin
2024-05-29  6:30       ` Cédric Le Goater
2024-05-30  6:38         ` Nicholas Piggin
2024-05-30  6:42           ` Cédric Le Goater
2024-05-26 12:26 ` [RFC PATCH 06/10] ppc: Add a core_index to CPUPPCState for SMT vCPUs Nicholas Piggin
2024-05-28  8:48   ` Harsh Prateek Bora
2024-05-28  8:52     ` Harsh Prateek Bora
2024-05-29  0:28       ` Nicholas Piggin
2024-05-26 12:26 ` [RFC PATCH 07/10] target/ppc: Add helpers to check for SMT sibling threads Nicholas Piggin
2024-05-28  9:16   ` Harsh Prateek Bora
2024-05-29  0:31     ` Nicholas Piggin
2024-05-29  6:34   ` Cédric Le Goater
2024-05-30  6:38     ` Nicholas Piggin
2024-05-26 12:26 ` [RFC PATCH 08/10] ppc/pnv: Invert the design for big-core machine modelling Nicholas Piggin
2024-05-29  6:57   ` Cédric Le Goater
2024-05-30  6:52     ` Nicholas Piggin
2024-05-30  7:46       ` Cédric Le Goater
2024-06-03  5:22         ` Nicholas Piggin
2024-05-29 10:49   ` Harsh Prateek Bora
2024-05-26 12:26 ` [RFC PATCH 09/10] ppc/pnv: Implement POWER10 PC xscom registers for direct controls Nicholas Piggin
2024-05-29  7:00   ` Cédric Le Goater
2024-05-30  6:53     ` Nicholas Piggin
2024-05-26 12:26 ` [RFC PATCH 10/10] ppc/pnv: Add an LPAR per core machine option Nicholas Piggin
2024-05-29  7:02   ` Cédric Le Goater
2024-05-27  6:25 ` [RFC PATCH 00/10] ppc/pnv: Better big-core model, lpar-per-core, PC unit Cédric Le Goater
2024-05-27  7:32   ` Nicholas Piggin
2024-05-27  7:36     ` Cédric Le Goater [this message]

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