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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Subject: Re: [PATCH v3 00/10] accel/tcg: Improve tb_flush usage
Date: Wed, 24 Sep 2025 14:14:16 +0200	[thread overview]
Message-ID: <6ef7e6e1-9ac1-466d-b4bc-332e135c258e@linaro.org> (raw)
In-Reply-To: <20250923215425.3685950-1-richard.henderson@linaro.org>

On 23/9/25 23:54, Richard Henderson wrote:
> It is too easy to mis-use tb_flush().  For instance, because of
> the cpu argument, some parts assumed that it needed to call the
> global flush function for every cpu.  It is easy to forget that
> the flush is not complete when the call returns: we have merely
> queued work to the cpu run loop.  So: remove tb_flush and expose
> only the core as tb_flush__exclusive, to be used only when we
> are already within an exclusive context.
> 
> In some cases (gdbstub, alpha, riscv, ppc spapr),
> we can eliminate the need for tb_flush completely.
> 
> Changes for v3:
>    - Rename to tb_flush__exclusive_or_serial; retain the serial
>      check within, not updating to exclusive only.
>    - Rename the existing tb_flush to queue_tb_flush; retain the
>      sequence number check for duplicated flushes.
>    - Drop EXCP_TB_FLUSH.

When using my split-accel branch, I had good results with v2.

I'm getting crashes with v3:

Termination Reason:    Namespace SIGNAL, Code 4 Illegal instruction: 4

Thread 4 Crashed:
0   ???                           	       0x34400fb00 ???
1   qemu-system-aarch64-unsigned  	       0x100fd74dc cpu_tb_exec + 160 (cpu-exec.c:441)
2   qemu-system-aarch64-unsigned  	       0x100fd829c cpu_loop_exec_tb + 32 (cpu-exec.c:897) [inlined]
3   qemu-system-aarch64-unsigned  	       0x100fd829c cpu_exec_loop + 904 (cpu-exec.c:1009)
4   qemu-system-aarch64-unsigned  	       0x100fd7a30 cpu_exec_setjmp + 48 (cpu-exec.c:1026)
5   qemu-system-aarch64-unsigned  	       0x100fd7954 cpu_exec + 496 (cpu-exec.c:1052)
6   qemu-system-aarch64-unsigned  	       0x100ff9bc4 tcg_cpu_exec + 44 (tcg-accel-ops.c:97)
7   qemu-system-aarch64-unsigned  	       0x100ffa4c4 mttcg_cpu_exec + 28 (tcg-accel-ops-mttcg.c:146)
8   qemu-system-aarch64-unsigned  	       0x10140bdac split_cpu_thread_routine + 540 (split-accel-ops.c:87)
9   qemu-system-aarch64-unsigned  	       0x10158f7e0 qemu_thread_start + 132 (qemu-thread-posix.c:393)

Thread 5:
0   qemu-system-aarch64-unsigned  	       0x100fb04e0 tcg_out_ld + 160 (tcg-target.c.inc:1268)
1   qemu-system-aarch64-unsigned  	       0x100fab3f8 tcg_reg_alloc_op + 240 [inlined]
2   qemu-system-aarch64-unsigned  	       0x100fab3f8 tcg_gen_code + 7932 (tcg.c:7018)
3   qemu-system-aarch64-unsigned  	       0x100fe9e88 setjmp_gen_code + 184 (translate-all.c:257)
4   qemu-system-aarch64-unsigned  	       0x100fe9780 tb_gen_code + 364 (translate-all.c:324)
5   qemu-system-aarch64-unsigned  	       0x100fd8138 cpu_exec_loop + 548 (cpu-exec.c:980)
6   qemu-system-aarch64-unsigned  	       0x100fd7a30 cpu_exec_setjmp + 48 (cpu-exec.c:1026)
7   qemu-system-aarch64-unsigned  	       0x100fd7954 cpu_exec + 496 (cpu-exec.c:1052)
8   qemu-system-aarch64-unsigned  	       0x100ff9bc4 tcg_cpu_exec + 44 (tcg-accel-ops.c:97)
9   qemu-system-aarch64-unsigned  	       0x100ffa4c4 mttcg_cpu_exec + 28 (tcg-accel-ops-mttcg.c:146)
10  qemu-system-aarch64-unsigned  	       0x10140bdac split_cpu_thread_routine + 540 (split-accel-ops.c:87)
11  qemu-system-aarch64-unsigned  	       0x10158f7e0 qemu_thread_start + 132 (qemu-thread-posix.c:393)



  parent reply	other threads:[~2025-09-24 12:15 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-23 21:54 [PATCH v3 00/10] accel/tcg: Improve tb_flush usage Richard Henderson
2025-09-23 21:54 ` [PATCH v3 01/10] gdbstub: Remove tb_flush uses Richard Henderson
2025-09-23 21:54 ` [PATCH v3 02/10] target/alpha: Simplify call_pal implementation Richard Henderson
2025-09-23 21:54 ` [PATCH v3 03/10] target/riscv: Record misa_ext in TCGTBCPUState.cs_base Richard Henderson
2025-09-23 21:54 ` [PATCH v3 04/10] hw/ppc/spapr: Use tb_invalidate_phys_range in h_page_init Richard Henderson
2025-09-24  3:20   ` Philippe Mathieu-Daudé
2025-09-23 21:54 ` [PATCH v3 05/10] accel/tcg: Split out tb_flush__exclusive_or_serial Richard Henderson
2025-09-25  2:15   ` Philippe Mathieu-Daudé
2025-09-23 21:54 ` [PATCH v3 06/10] accel/tcg: Move post-load tb_flush to vm_change_state hook Richard Henderson
2025-09-23 21:54 ` [PATCH v3 07/10] plugins: Use tb_flush__exclusive_or_serial Richard Henderson
2025-09-23 21:54 ` [PATCH v3 08/10] linux-user: Split out begin_parallel_context Richard Henderson
2025-09-24  3:23   ` Philippe Mathieu-Daudé
2025-09-23 21:54 ` [PATCH v3 09/10] accel/tcg: Create queue_tb_flush from tb_flush Richard Henderson
2025-09-24  3:26   ` Philippe Mathieu-Daudé
2025-09-23 21:54 ` [PATCH v3 10/10] accel/tcg: Improve buffer overflow in tb_gen_code Richard Henderson
2025-09-24 12:14 ` Philippe Mathieu-Daudé [this message]
2025-09-24 16:39   ` [PATCH v3 00/10] accel/tcg: Improve tb_flush usage Richard Henderson

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