From: Richard Henderson <rth@twiddle.net>
To: Sergey Sorokin <afarallax@yandex.ru>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Peter Crosthwaite <crosthwaite.peter@gmail.com>,
Alexander Graf <agraf@suse.de>,
"qemu-arm@nongnu.org" <qemu-arm@nongnu.org>,
Claudio Fontana <claudio.fontana@huawei.com>,
"Vassili Karpov (malc)" <av1474@comtv.ru>
Subject: Re: [Qemu-devel] [PATCH] Improve the alignment check infrastructure
Date: Mon, 20 Jun 2016 12:16:03 -0700 [thread overview]
Message-ID: <6ef866a2-ba0c-4814-a2b8-fedd28be5599@twiddle.net> (raw)
In-Reply-To: <44881466444025@web26m.yandex.ru>
On 06/20/2016 10:33 AM, Sergey Sorokin wrote:
>> I'm thinking of the AVR target currently under review which requires
>> TARGET_PAGE_BITS == 8 in order to support the memory device layout.
>>
> What is maximum alignment size for AVR? I think it's possible to implement some
> checks for this maximum.
It's an 8-bit microcontroler -- maximum alignment is 1. ;-)
r~
next prev parent reply other threads:[~2016-06-20 19:16 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-20 13:56 [Qemu-devel] [PATCH] Improve the alignment check infrastructure Sergey Sorokin
2016-06-20 15:45 ` Richard Henderson
2016-06-20 17:33 ` Sergey Sorokin
2016-06-20 19:16 ` Richard Henderson [this message]
2016-06-22 12:39 ` Sergey Sorokin
-- strict thread matches above, loose matches on Subject: below --
2016-06-22 12:33 Sergey Sorokin
2016-06-22 12:37 ` Sergey Sorokin
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