qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Laszlo Ersek <lersek@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>, Ed Maste <emaste@freebsd.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: Re: [Qemu-devel] [PATCH v3 00/20] GICv3 emulation
Date: Thu, 23 Jun 2016 13:36:40 +0200	[thread overview]
Message-ID: <6f08849a-f76e-31f4-178f-ea67da824e59@redhat.com> (raw)
In-Reply-To: <CAFEAcA_wA0VG4e8v9nFJ+Wj1NCePGZyi+Z85seKs2+caGP7xug@mail.gmail.com>

On 06/22/16 22:53, Peter Maydell wrote:
> On 22 June 2016 at 19:09, Ed Maste <emaste@freebsd.org> wrote:
>> On 15 June 2016 at 06:10, Peter Maydell <peter.maydell@linaro.org> wrote:
>>>
>>> A quick scan through http://fxr.watson.org/fxr/source/arm64/arm64/gic_v3.c
>>> doesn't seem to show it setting the IGROUPR registers anywhere,
>>> so it probably is a guest bug. (You can use "-d 'trace:gicv3*'" to
>>> enable the tracepoints for the GIC which would let you check whether
>>> the guest ever tries to write to the group config registers.)
>>
>> Is there a prebuilt QEMU_EFI.fd available somewhere for testing a
>> FreeBSD change to address this? I've been using the prebuilt ones from
>> https://wiki.linaro.org/LEG/UEFIforQEMU and the latest one I had did
>> not start with gic-version=3.
> 
> Yeah, it looks like the same bug is also present in UEFI itself
> (it's super popular!). Laszlo, Ard, do you have a prebuilt
> UEFI binary with Ard's fix?

I just put up one here, in case it's still needed:

http://people.redhat.com/~lersek/82a5e88f-f1e1-42e2-8462-66974c9cbfff/

Thanks
Laszlo

  parent reply	other threads:[~2016-06-23 11:36 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-14 14:38 [Qemu-devel] [PATCH v3 00/20] GICv3 emulation Peter Maydell
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 01/20] migration: Define VMSTATE_UINT64_2DARRAY Peter Maydell
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 02/20] bitops.h: Implement half-shuffle and half-unshuffle ops Peter Maydell
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 03/20] target-arm: Define new arm_is_el3_or_mon() function Peter Maydell
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 04/20] target-arm: Provide hook to tell GICv3 about changes of security state Peter Maydell
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 05/20] target-arm: Add mp-affinity property for ARM CPU class Peter Maydell
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 06/20] hw/intc/arm_gicv3: Add state information Peter Maydell
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 07/20] hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure Peter Maydell
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 08/20] hw/intc/arm_gicv3: Add vmstate descriptors Peter Maydell
2016-06-15  2:30   ` Shannon Zhao
2016-06-16  2:12   ` Shannon Zhao
2016-06-16 14:23     ` Peter Maydell
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 09/20] hw/intc/arm_gicv3: ARM GICv3 device framework Peter Maydell
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 10/20] hw/intc/arm_gicv3: Implement functions to identify next pending irq Peter Maydell
2016-06-15  2:35   ` Shannon Zhao
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 11/20] hw/intc/arm_gicv3: Implement GICv3 distributor registers Peter Maydell
2016-06-15  2:36   ` Shannon Zhao
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 12/20] hw/intc/arm_gicv3: Implement GICv3 redistributor registers Peter Maydell
2016-06-15  2:42   ` Shannon Zhao
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 13/20] hw/intc/arm_gicv3: Wire up distributor and redistributor MMIO regions Peter Maydell
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 14/20] hw/intc/arm_gicv3: Implement gicv3_set_irq() Peter Maydell
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 15/20] hw/intc/arm_gicv3: Implement GICv3 CPU interface registers Peter Maydell
2016-06-15  2:45   ` Shannon Zhao
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 16/20] hw/intc/arm_gicv3: Implement gicv3_cpuif_update() Peter Maydell
2016-06-15  2:47   ` Shannon Zhao
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 17/20] hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers Peter Maydell
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 18/20] hw/intc/arm_gicv3: Add IRQ handling CPU interface registers Peter Maydell
2016-06-15  3:15   ` Shannon Zhao
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 19/20] target-arm/machine.c: Allow user to request GICv3 emulation Peter Maydell
2016-06-14 14:38 ` [Qemu-devel] [PATCH v3 20/20] target-arm/monitor.c: Advertise emulated GICv3 in capabilities Peter Maydell
2016-06-15  2:52 ` [Qemu-devel] [PATCH v3 00/20] GICv3 emulation Shannon Zhao
2016-06-15  8:53 ` Shannon Zhao
2016-06-15  9:20   ` Andrew Jones
2016-06-15 10:06     ` Peter Maydell
2016-06-15 10:10       ` Peter Maydell
2016-06-15 14:02         ` Shannon Zhao
2016-06-15 14:06           ` Peter Maydell
2016-06-16  2:17         ` Shannon Zhao
2016-06-22 18:09         ` Ed Maste
2016-06-22 20:53           ` Peter Maydell
2016-06-22 21:45             ` Ed Maste
2016-06-22 21:56               ` Peter Maydell
2016-06-23  1:42               ` Shannon Zhao
2016-06-23 11:36             ` Laszlo Ersek [this message]
2016-06-23 12:07               ` Andrew Jones
2016-06-23 14:18               ` Ed Maste
2016-06-23 14:52                 ` Laszlo Ersek
2016-06-23 20:03                   ` Ard Biesheuvel
2016-06-23 20:33                     ` Peter Maydell
2016-06-24  8:16                       ` Ard Biesheuvel
2016-06-21 14:45   ` Andrew Jones
2016-06-21 14:55     ` Peter Maydell
2016-06-21 15:12       ` Andrew Jones
2016-06-21 17:15         ` Andrew Jones
2016-06-21 17:17           ` Peter Maydell
2016-06-21 17:18           ` Andrew Jones
2016-06-21 17:21             ` Peter Maydell
2016-06-21 19:45               ` Laszlo Ersek
2016-06-21 19:53                 ` Peter Maydell
2016-06-22  1:42                   ` Shannon Zhao
2016-06-22  7:43                     ` Andrew Jones
2016-06-22  8:27                       ` Shannon Zhao
2016-06-22  9:09                         ` Andrew Jones
2016-06-22 15:23                           ` Laszlo Ersek

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=6f08849a-f76e-31f4-178f-ea67da824e59@redhat.com \
    --to=lersek@redhat.com \
    --cc=ard.biesheuvel@linaro.org \
    --cc=emaste@freebsd.org \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).