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[176.184.18.96]) by smtp.gmail.com with ESMTPSA id k20-20020aa7c054000000b005657eefa8e9sm10309edo.4.2024.02.22.22.15.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 22 Feb 2024 22:15:59 -0800 (PST) Message-ID: <6f947660-b116-4ba3-806d-6fd4a12836f5@linaro.org> Date: Fri, 23 Feb 2024 07:15:58 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/3] hw/i2c: Implement Broadcom Serial Controller (BSC) Content-Language: en-US To: Rayhan Faizel , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, pbonzini@redhat.com, qemu-arm@nongnu.org References: <20240220134120.2961059-1-rayhan.faizel@gmail.com> <20240220134120.2961059-2-rayhan.faizel@gmail.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20240220134120.2961059-2-rayhan.faizel@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::52e; envelope-from=philmd@linaro.org; helo=mail-ed1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 20/2/24 14:41, Rayhan Faizel wrote: > A few deficiencies in the current device model need to be noted. > > 1. FIFOs are not used. All sends and receives are done directly. > 2. Repeated starts are not emulated. Repeated starts can be triggered in real > hardware by sending a new read transfer request in the window time between > transfer active set of write transfer request and done bit set of the same. > > Signed-off-by: Rayhan Faizel > --- > docs/system/arm/raspi.rst | 1 + > hw/i2c/Kconfig | 4 + > hw/i2c/bcm2835_i2c.c | 278 +++++++++++++++++++++++++++++++++++ > hw/i2c/meson.build | 1 + > include/hw/i2c/bcm2835_i2c.h | 80 ++++++++++ > 5 files changed, 364 insertions(+) > create mode 100644 hw/i2c/bcm2835_i2c.c > create mode 100644 include/hw/i2c/bcm2835_i2c.h > +static const MemoryRegionOps bcm2835_i2c_ops = { > + .read = bcm2835_i2c_read, > + .write = bcm2835_i2c_write, > + .endianness = DEVICE_NATIVE_ENDIAN, Watch out, your implementation is 32-bit, so this misses: .impl = { .min_access_size = 4, .max_access_size = 4, }, > +}; > diff --git a/include/hw/i2c/bcm2835_i2c.h b/include/hw/i2c/bcm2835_i2c.h > new file mode 100644 > index 0000000000..0a56df4720 > --- /dev/null > +++ b/include/hw/i2c/bcm2835_i2c.h > +#define BCM2835_I2C_C 0x0 /* Control */ > +#define BCM2835_I2C_S 0x4 /* Status */ > +#define BCM2835_I2C_DLEN 0x8 /* Data Length */ > +#define BCM2835_I2C_A 0xc /* Slave Address */ > +#define BCM2835_I2C_FIFO 0x10 /* FIFO */ > +#define BCM2835_I2C_DIV 0x14 /* Clock Divider */ > +#define BCM2835_I2C_DEL 0x18 /* Data Delay */ > +#define BCM2835_I2C_CLKT 0x20 /* Clock Stretch Timeout */