Re: [PATCH v3 1/1] target/i386: Enable page walking from MMIO memory

[Richard Henderson <richard.henderson@linaro.org>]

Paolo, ping!

On 3/13/24 09:30, Richard Henderson wrote:
> On 3/7/24 05:53, Jonathan Cameron wrote:
>> From: Gregory Price <gregory.price@memverge.com>
>>
>> CXL emulation of interleave requires read and write hooks due to
>> requirement for subpage granularity. The Linux kernel stack now enables
>> using this memory as conventional memory in a separate NUMA node. If a
>> process is deliberately forced to run from that node
>> $ numactl --membind=1 ls
>> the page table walk on i386 fails.
>>
>> Useful part of backtrace:
>>
>>      (cpu=cpu@entry=0x555556fd9000, fmt=fmt@entry=0x555555fe3378 "cpu_io_recompile: 
>> could not find TB for pc=%p")
>>      at ../../cpu-target.c:359
>>      (retaddr=0, addr=19595792376, attrs=..., xlat=<optimized out>, cpu=0x555556fd9000, 
>> out_offset=<synthetic pointer>)
>>      at ../../accel/tcg/cputlb.c:1339
>>      (cpu=0x555556fd9000, full=0x7fffee0d96e0, ret_be=ret_be@entry=0, addr=19595792376, 
>> size=size@entry=8, mmu_idx=4, type=MMU_DATA_LOAD, ra=0) at ../../accel/tcg/cputlb.c:2030
>>      (cpu=cpu@entry=0x555556fd9000, p=p@entry=0x7ffff56fddc0, mmu_idx=<optimized out>, 
>> type=type@entry=MMU_DATA_LOAD, memop=<optimized out>, ra=ra@entry=0) at 
>> ../../accel/tcg/cputlb.c:2356
>>      (cpu=cpu@entry=0x555556fd9000, addr=addr@entry=19595792376, oi=oi@entry=52, 
>> ra=ra@entry=0, access_type=access_type@entry=MMU_DATA_LOAD) at 
>> ../../accel/tcg/cputlb.c:2439
>>      at ../../accel/tcg/ldst_common.c.inc:301
>>      at ../../target/i386/tcg/sysemu/excp_helper.c:173
>>      (err=0x7ffff56fdf80, out=0x7ffff56fdf70, mmu_idx=0, access_type=MMU_INST_FETCH, 
>> addr=18446744072116178925, env=0x555556fdb7c0)
>>      at ../../target/i386/tcg/sysemu/excp_helper.c:578
>>      (cs=0x555556fd9000, addr=18446744072116178925, size=<optimized out>, 
>> access_type=MMU_INST_FETCH, mmu_idx=0, probe=<optimized out>, retaddr=0) at 
>> ../../target/i386/tcg/sysemu/excp_helper.c:604
>>
>> Avoid this by plumbing the address all the way down from
>> x86_cpu_tlb_fill() where is available as retaddr to the actual accessors
>> which provide it to probe_access_full() which already handles MMIO accesses.
>>
>> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>> Suggested-by: Peter Maydell <peter.maydell@linaro.org>
>> Signed-off-by: Gregory Price <gregory.price@memverge.com>
>> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>> ---
>> v3: No change.
> 
> Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2180
> Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2220
> 
> 
> r~