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[173.197.98.125]) by smtp.gmail.com with ESMTPSA id ks11-20020a056a004b8b00b006e647059cccsm12406016pfb.33.2024.03.20.19.34.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 20 Mar 2024 19:34:06 -0700 (PDT) Message-ID: <70513c91-cc10-4e64-9e9e-c48aad7dd822@linaro.org> Date: Wed, 20 Mar 2024 16:34:03 -1000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/1] target/i386: Enable page walking from MMIO memory Content-Language: en-US From: Richard Henderson To: Jonathan Cameron , Paolo Bonzini , Eduardo Habkost , qemu-devel@nongnu.org Cc: Peter Maydell , Gregory Price , =?UTF-8?Q?Alex_Benn=C3=A9e?= , linuxarm@huawei.com References: <20240307155304.31241-1-Jonathan.Cameron@huawei.com> <20240307155304.31241-2-Jonathan.Cameron@huawei.com> <731fa1ad-5831-4b94-bea4-c57bce01a260@linaro.org> In-Reply-To: <731fa1ad-5831-4b94-bea4-c57bce01a260@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, WEIRD_PORT=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Paolo, ping! On 3/13/24 09:30, Richard Henderson wrote: > On 3/7/24 05:53, Jonathan Cameron wrote: >> From: Gregory Price >> >> CXL emulation of interleave requires read and write hooks due to >> requirement for subpage granularity. The Linux kernel stack now enables >> using this memory as conventional memory in a separate NUMA node. If a >> process is deliberately forced to run from that node >> $ numactl --membind=1 ls >> the page table walk on i386 fails. >> >> Useful part of backtrace: >> >>      (cpu=cpu@entry=0x555556fd9000, fmt=fmt@entry=0x555555fe3378 "cpu_io_recompile: >> could not find TB for pc=%p") >>      at ../../cpu-target.c:359 >>      (retaddr=0, addr=19595792376, attrs=..., xlat=, cpu=0x555556fd9000, >> out_offset=) >>      at ../../accel/tcg/cputlb.c:1339 >>      (cpu=0x555556fd9000, full=0x7fffee0d96e0, ret_be=ret_be@entry=0, addr=19595792376, >> size=size@entry=8, mmu_idx=4, type=MMU_DATA_LOAD, ra=0) at ../../accel/tcg/cputlb.c:2030 >>      (cpu=cpu@entry=0x555556fd9000, p=p@entry=0x7ffff56fddc0, mmu_idx=, >> type=type@entry=MMU_DATA_LOAD, memop=, ra=ra@entry=0) at >> ../../accel/tcg/cputlb.c:2356 >>      (cpu=cpu@entry=0x555556fd9000, addr=addr@entry=19595792376, oi=oi@entry=52, >> ra=ra@entry=0, access_type=access_type@entry=MMU_DATA_LOAD) at >> ../../accel/tcg/cputlb.c:2439 >>      at ../../accel/tcg/ldst_common.c.inc:301 >>      at ../../target/i386/tcg/sysemu/excp_helper.c:173 >>      (err=0x7ffff56fdf80, out=0x7ffff56fdf70, mmu_idx=0, access_type=MMU_INST_FETCH, >> addr=18446744072116178925, env=0x555556fdb7c0) >>      at ../../target/i386/tcg/sysemu/excp_helper.c:578 >>      (cs=0x555556fd9000, addr=18446744072116178925, size=, >> access_type=MMU_INST_FETCH, mmu_idx=0, probe=, retaddr=0) at >> ../../target/i386/tcg/sysemu/excp_helper.c:604 >> >> Avoid this by plumbing the address all the way down from >> x86_cpu_tlb_fill() where is available as retaddr to the actual accessors >> which provide it to probe_access_full() which already handles MMIO accesses. >> >> Reviewed-by: Philippe Mathieu-Daudé >> Reviewed-by: Richard Henderson >> Suggested-by: Peter Maydell >> Signed-off-by: Gregory Price >> Signed-off-by: Jonathan Cameron >> --- >> v3: No change. > > Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2180 > Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2220 > > > r~