From: Max Chou <max.chou@sifive.com>
To: Anton Blanchard <antonb@tenstorrent.com>,
qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>,
Bin Meng <bmeng.cn@gmail.com>, Weiwei Li <liwei1518@gmail.com>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Subject: Re: [PATCH 10/12] target/riscv: handle vwadd.wv form vs1 and vs2 overlap
Date: Fri, 7 Feb 2025 17:42:30 +0800 [thread overview]
Message-ID: <70a79709-d14f-49d6-a33c-13589df1ec22@sifive.com> (raw)
In-Reply-To: <20250126072056.4004912-11-antonb@tenstorrent.com>
Hi Anton,
This patch violates some coding style rules of QEMU.
You can verify the coding style by running the checkpatch.pl script in
the QEMU repository.
(ref:
https://www.qemu.org/docs/master/devel/submitting-a-patch.html#use-the-qemu-coding-style)
The patch 12 also has the same issue.
Thanks,
Max
On 2025/1/26 3:20 PM, Anton Blanchard wrote:
> for 2*SEW = 2*SEW op SEW instructions vs2 and vs1 cannot overlap
> because it would mean a register is read with two different SEW
> settings.
>
> Signed-off-by: Anton Blanchard <antonb@tenstorrent.com>
> ---
> target/riscv/insn_trans/trans_rvv.c.inc | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc
> index 2309d9abd0..312d8b1b81 100644
> --- a/target/riscv/insn_trans/trans_rvv.c.inc
> +++ b/target/riscv/insn_trans/trans_rvv.c.inc
> @@ -549,7 +549,8 @@ static bool vext_check_dds(DisasContext *s, int vd, int vs1, int vs2, int vm)
> {
> return vext_check_ds(s, vd, vs1, vm) &&
> require_vm(vm, vs2) &&
> - require_align(vs2, s->lmul + 1);
> + require_align(vs2, s->lmul + 1) &&
> + !is_overlapped(vs2, 1 << MAX(s->lmul+1, 0), vs1, 1 << MAX(s->lmul, 0));
> }
>
> static bool vext_check_sd(DisasContext *s, int vd, int vs, int vm)
next prev parent reply other threads:[~2025-02-07 9:43 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-26 7:20 [PATCH 00/12] target/riscv: Fix some RISC-V instruction corner cases Anton Blanchard
2025-01-26 7:20 ` [PATCH 01/12] target/riscv: Source vector registers cannot overlap mask register Anton Blanchard
2025-02-07 9:26 ` Max Chou
2025-01-26 7:20 ` [PATCH 02/12] target/riscv: handle vrgather mask and source overlap Anton Blanchard
2025-02-07 9:33 ` Max Chou
2025-01-26 7:20 ` [PATCH 03/12] target/riscv: handle vadd.vx form " Anton Blanchard
2025-02-07 9:37 ` Max Chou
2025-01-26 7:20 ` [PATCH 04/12] target/riscv: handle vadd.vv " Anton Blanchard
2025-01-26 7:20 ` [PATCH 05/12] target/riscv: handle vslide1down.vx " Anton Blanchard
2025-02-07 9:39 ` Max Chou
2025-01-26 7:20 ` [PATCH 06/12] target/riscv: handle vzext.vf2 " Anton Blanchard
2025-01-26 7:20 ` [PATCH 07/12] target/riscv: handle vwadd.vx " Anton Blanchard
2025-01-26 7:20 ` [PATCH 08/12] target/riscv: handle vwadd.vv " Anton Blanchard
2025-01-26 7:20 ` [PATCH 09/12] target/riscv: handle vwadd.wv " Anton Blanchard
2025-01-26 7:20 ` [PATCH 10/12] target/riscv: handle vwadd.wv form vs1 and vs2 overlap Anton Blanchard
2025-02-07 9:42 ` Max Chou [this message]
2025-01-26 7:20 ` [PATCH 11/12] target/riscv: Add CHECK arg to GEN_OPFVF_WIDEN_TRANS Anton Blanchard
2025-02-07 9:45 ` Max Chou
2025-01-26 7:20 ` [PATCH 12/12] target/riscv: handle overlap in widening instructions with overwrite Anton Blanchard
2025-02-27 14:47 ` [PATCH 00/12] target/riscv: Fix some RISC-V instruction corner cases Max Chou
2025-03-17 2:08 ` [CAUTION - External Sender] " Anton Blanchard
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=70a79709-d14f-49d6-a33c-13589df1ec22@sifive.com \
--to=max.chou@sifive.com \
--cc=alistair.francis@wdc.com \
--cc=antonb@tenstorrent.com \
--cc=bmeng.cn@gmail.com \
--cc=dbarboza@ventanamicro.com \
--cc=liwei1518@gmail.com \
--cc=palmer@dabbelt.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=zhiwei_liu@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).