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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3d520eada16sm19054405f8f.41.2025.09.04.07.31.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 04 Sep 2025 07:31:55 -0700 (PDT) Message-ID: <71ca9132-8deb-4f57-abb0-2bcc0fe93ae9@redhat.com> Date: Thu, 4 Sep 2025 16:31:53 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v3 05/15] hw/arm/smmuv3-accel: Introduce smmuv3 accel device Content-Language: en-US To: "Duan, Zhenzhong" , Nicolin Chen , skolothumtho@nvidia.com Cc: "qemu-arm@nongnu.org" , "qemu-devel@nongnu.org" , "peter.maydell@linaro.org" , "jgg@nvidia.com" , "ddutile@redhat.com" , "berrange@redhat.com" , "nathanc@nvidia.com" , "mochs@nvidia.com" , "smostafa@google.com" , Linuxarm , "Wangzhou (B)" , jiangkunkun , Jonathan Cameron , "zhangfei.gao@linaro.org" , "shameerkolothum@gmail.com" References: <20250714155941.22176-1-shameerali.kolothum.thodi@huawei.com> <20250714155941.22176-6-shameerali.kolothum.thodi@huawei.com> <6ee7908c8ea44270b9f4aa64abacaace@huawei.com> From: Eric Auger In-Reply-To: <6ee7908c8ea44270b9f4aa64abacaace@huawei.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Shameer, On 7/16/25 11:27 AM, Shameerali Kolothum Thodi wrote: > >> -----Original Message----- >> From: Duan, Zhenzhong >> Sent: Wednesday, July 16, 2025 4:39 AM >> To: Nicolin Chen >> Cc: Shameerali Kolothum Thodi >> ; qemu-arm@nongnu.org; >> qemu-devel@nongnu.org; eric.auger@redhat.com; >> peter.maydell@linaro.org; jgg@nvidia.com; ddutile@redhat.com; >> berrange@redhat.com; nathanc@nvidia.com; mochs@nvidia.com; >> smostafa@google.com; Linuxarm ; Wangzhou (B) >> ; jiangkunkun ; >> Jonathan Cameron ; >> zhangfei.gao@linaro.org; shameerkolothum@gmail.com >> Subject: RE: [RFC PATCH v3 05/15] hw/arm/smmuv3-accel: Introduce >> smmuv3 accel device >> >> >> >>> -----Original Message----- >>> From: Nicolin Chen >>> Subject: Re: [RFC PATCH v3 05/15] hw/arm/smmuv3-accel: Introduce >>> smmuv3 accel device >>> >>> On Tue, Jul 15, 2025 at 10:48:31AM +0000, Duan, Zhenzhong wrote: >>>>> +static const TypeInfo types[] = { >>>>> + { >>>>> + .name = TYPE_ARM_SMMUV3_ACCEL, >>>>> + .parent = TYPE_ARM_SMMUV3, >>>>> + .class_init = smmuv3_accel_class_init, >>>>> + } >>>> In cover-letter, I see "-device arm-smmuv3", so where is above accel >>>> device created so we could use smmuv3_accel_ops? >>> The smmu-common.c is the shared file between accel and non-accel >>> instances. It has a module property: >>> DEFINE_PROP_BOOL("accel", SMMUState, accel, false), >> It looks we expose a new TYPE_ARM_SMMUV3_ACCEL type device just for >> exporting accel iommu_ops? >> What about returning accel iommu_ops directly in >> smmu_iommu_ops_by_type() and drop the new type? > We are not creating any new device here. Its just a Class object of different type. > I had a different approach previously and Eric suggested to try this as there > are examples in VFIO/IOMMUFD for something like this. > > https://lore.kernel.org/qemu-devel/1105d100-dd1e-4aca-b518-50f903967416@redhat.com/ Actually I pointed out that usually we don't add methods in states as it was done in v2 (in SMMUState) but rather in classes hence my suggestion to use a class instead. Now what looks strange is your class does not implement any method ;-) docs/devel/qom.rst says "The #ObjectClass typically holds a table of function pointers for the virtual methods implemented by this type." Sorry if I was unclear. Now if you don't need any "accel" specific methods besides the PCIIOMMUOps which have a specific struct, I am not sure we need a class anymore. or then you direct embed the PCIIOMMUOps Struct in the method? Also it's true that's weird that the actual object is never instantiated and may also appear in qom object list. This is not the case for the example I gave, ie. the VFIOContainerBase. I don't know if anyone has a better/more elegant idea? Thanks Eric > > Thanks, > Shameer > >>> where it directs to different iommu_ops: >>> 937 static const PCIIOMMUOps *smmu_iommu_ops_by_type(SMMUState >> *s) >>> 938 { >>> 939 SMMUBaseClass *sbc; >>> 940 >>> 941 if (s->accel) { >>> 942 sbc = >>> ARM_SMMU_CLASS(object_class_by_name(TYPE_ARM_SMMUV3_ACCEL)); >>> 943 } else { >>> 944 sbc = >>> ARM_SMMU_CLASS(object_class_by_name(TYPE_ARM_SMMU)); >>> 945 } >>> 946 assert(sbc->iommu_ops); >>> 947 >>> 948 return sbc->iommu_ops; >>> 949 } >>> >>> Nicolin