* [PULL v2 00/63] First batch of i386 and build system patch for QEMU 9.1
@ 2024-04-24 8:14 Paolo Bonzini
2024-04-24 8:14 ` [PULL v2 25/63] i386/kvm: Move architectural CPUID leaf generation to separate helper Paolo Bonzini
2024-04-24 18:49 ` [PULL v2 00/63] First batch of i386 and build system patch for QEMU 9.1 Richard Henderson
0 siblings, 2 replies; 6+ messages in thread
From: Paolo Bonzini @ 2024-04-24 8:14 UTC (permalink / raw)
To: qemu-devel
The following changes since commit 62dbe54c24dbf77051bafe1039c31ddc8f37602d:
Update version for v9.0.0-rc4 release (2024-04-16 18:06:15 +0100)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you to fetch changes up to 7653b44534d3267fa63ebc9d7221eaa7b48bf5ae:
target/i386/translate.c: always write 32-bits for SGDT and SIDT (2024-04-23 17:35:26 +0200)
----------------------------------------------------------------
* cleanups for stubs
* do not link pixman automatically into all targets
* optimize computation of VGA dirty memory region
* kvm: use configs/ definition to conditionalize debug support
* hw: Add compat machines for 9.1
* target/i386: add guest-phys-bits cpu property
* target/i386: Introduce Icelake-Server-v7 and SierraForest models
* target/i386: Export RFDS bit to guests
* q35: SMM ranges cleanups
* target/i386: basic support for confidential guests
* linux-headers: update headers
* target/i386: SEV: use KVM_SEV_INIT2 if possible
* kvm: Introduce support for memory_attributes
* RAMBlock: Add support of KVM private guest memfd
* Consolidate use of warn_report_once()
* pythondeps.toml: warn about updates needed to docs/requirements.txt
* target/i386: always write 32-bits for SGDT and SIDT
----------------------------------------------------------------
Chao Peng (2):
kvm: Enable KVM_SET_USER_MEMORY_REGION2 for memslot
kvm: handle KVM_EXIT_MEMORY_FAULT
Gerd Hoffmann (2):
target/i386: add guest-phys-bits cpu property
kvm: add support for guest physical bits
Isaku Yamahata (4):
pci-host/q35: Move PAM initialization above SMRAM initialization
q35: Introduce smm_ranges property for q35-pci-host
kvm/tdx: Don't complain when converting vMMIO region to shared
kvm/tdx: Ignore memory conversion to shared of unassigned region
Mark Cave-Ayland (1):
target/i386/translate.c: always write 32-bits for SGDT and SIDT
Michael Roth (4):
scripts/update-linux-headers: Add setup_data.h to import list
scripts/update-linux-headers: Add bits.h to file imports
i386/sev: Add 'legacy-vm-type' parameter for SEV guest objects
hw/i386/sev: Use legacy SEV VM types for older machine types
Paolo Bonzini (28):
meson: do not link pixman automatically into all targets
tests: only build plugins if TCG is enabled
tests/unit: match some unit tests to corresponding feature switches
yank: only build if needed
hw/core: Move system emulation files to system_ss
stubs: remove obsolete stubs
hw/usb: move stubs out of stubs/
hw/virtio: move stubs out of stubs/
semihosting: move stubs out of stubs/
ramfb: move stubs out of stubs/
memory-device: move stubs out of stubs/
colo: move stubs out of stubs/
stubs: split record/replay stubs further
stubs: include stubs only if needed
stubs: move monitor_fdsets_cleanup with other fdset stubs
vga: optimize computation of dirty memory region
vga: move dirty memory region code together
kvm: use configs/ definition to conditionalize debug support
hw: Add compat machines for 9.1
linux-headers: update to current kvm/next
runstate: skip initial CPU reset if reset is not actually possible
KVM: track whether guest state is encrypted
KVM: remove kvm_arch_cpu_check_are_resettable
target/i386: introduce x86-confidential-guest
target/i386: Implement mc->kvm_type() to get VM type
target/i386: SEV: use KVM_SEV_INIT2 if possible
RAMBlock: make guest_memfd require uncoordinated discard
pythondeps.toml: warn about updates needed to docs/requirements.txt
Pawan Gupta (1):
target/i386: Export RFDS bit to guests
Philippe Mathieu-Daudé (3):
ebpf: Restrict to system emulation
util/qemu-config: Extract QMP commands to qemu-config-qmp.c
hw: Include minimal source set in user emulation build
Sean Christopherson (1):
i386/kvm: Move architectural CPUID leaf generation to separate helper
Tao Su (1):
target/i386: Add new CPU model SierraForest
Xiaoyao Li (11):
hw/i386/acpi: Set PCAT_COMPAT bit only when pic is not disabled
confidential guest support: Add kvm_init() and kvm_reset() in class
i386/sev: Switch to use confidential_guest_kvm_init()
ppc/pef: switch to use confidential_guest_kvm_init/reset()
s390: Switch to use confidential_guest_kvm_init()
trace/kvm: Split address space and slot id in trace_kvm_set_user_memory()
kvm: Introduce support for memory_attributes
RAMBlock: Add support of KVM private guest memfd
kvm/memory: Make memory type private by default if it has guest memfd backend
HostMem: Add mechanism to opt in kvm guest memfd via MachineState
physmem: Introduce ram_block_discard_guest_memfd_range()
Zhao Liu (4):
target/i386/host-cpu: Consolidate the use of warn_report_once()
target/i386/cpu: Consolidate the use of warn_report_once()
target/i386/cpu: Merge the warning and error messages for AMD HT check
accel/tcg/icount-common: Consolidate the use of warn_report_once()
Zhenzhong Duan (1):
target/i386: Introduce Icelake-Server-v7 to enable TSX
docs/requirements.txt | 3 +
configs/targets/aarch64-softmmu.mak | 1 +
configs/targets/i386-softmmu.mak | 1 +
configs/targets/ppc-softmmu.mak | 1 +
configs/targets/ppc64-softmmu.mak | 1 +
configs/targets/s390x-softmmu.mak | 1 +
configs/targets/x86_64-softmmu.mak | 1 +
meson.build | 8 +-
qapi/qom.json | 11 +-
include/exec/confidential-guest-support.h | 34 +-
include/exec/cpu-common.h | 2 +
include/exec/memory.h | 20 +-
include/exec/ram_addr.h | 2 +-
include/exec/ramblock.h | 1 +
include/hw/boards.h | 5 +
include/hw/i386/pc.h | 4 +
include/hw/pci-host/q35.h | 1 +
include/hw/ppc/pef.h | 17 -
include/qemu/config-file.h | 3 +
include/standard-headers/asm-x86/bootparam.h | 17 +-
include/standard-headers/asm-x86/kvm_para.h | 3 +-
include/standard-headers/asm-x86/setup_data.h | 83 +++
include/standard-headers/linux/ethtool.h | 48 ++
include/standard-headers/linux/fuse.h | 39 +-
include/standard-headers/linux/input-event-codes.h | 1 +
include/standard-headers/linux/virtio_gpu.h | 2 +
include/standard-headers/linux/virtio_pci.h | 10 +-
include/standard-headers/linux/virtio_snd.h | 154 +++++
include/sysemu/hostmem.h | 1 +
include/sysemu/kvm.h | 22 +-
include/sysemu/kvm_int.h | 5 +-
include/sysemu/sysemu.h | 2 -
linux-headers/asm-arm64/kvm.h | 15 +-
linux-headers/asm-arm64/sve_context.h | 11 +
linux-headers/asm-generic/bitsperlong.h | 4 +
linux-headers/asm-loongarch/kvm.h | 2 -
linux-headers/asm-mips/kvm.h | 2 -
linux-headers/asm-powerpc/kvm.h | 45 +-
linux-headers/asm-riscv/kvm.h | 3 +-
linux-headers/asm-s390/kvm.h | 315 +++++++++-
linux-headers/asm-x86/kvm.h | 328 +++++++++-
linux-headers/linux/bits.h | 15 +
linux-headers/linux/kvm.h | 689 +--------------------
linux-headers/linux/psp-sev.h | 59 ++
linux-headers/linux/vhost.h | 7 +
target/i386/confidential-guest.h | 59 ++
target/i386/cpu.h | 8 +
target/i386/kvm/kvm_i386.h | 2 +
target/i386/sev.h | 2 -
target/s390x/kvm/pv.h | 14 -
accel/kvm/kvm-accel-ops.c | 6 +-
accel/kvm/kvm-all.c | 274 +++++++-
accel/stubs/kvm-stub.c | 5 +
accel/tcg/icount-common.c | 6 +-
backends/hostmem-file.c | 1 +
backends/hostmem-memfd.c | 1 +
backends/hostmem-ram.c | 1 +
backends/hostmem.c | 1 +
hw/arm/virt.c | 11 +-
hw/core/machine.c | 8 +
stubs/ramfb.c => hw/display/ramfb-stubs.c | 0
hw/display/vga.c | 32 +-
hw/i386/acpi-common.c | 4 +-
hw/i386/pc.c | 6 +
hw/i386/pc_piix.c | 17 +-
hw/i386/pc_q35.c | 16 +-
hw/i386/x86.c | 19 +-
hw/m68k/virt.c | 11 +-
.../mem/memory-device-stubs.c | 0
hw/pci-host/q35.c | 61 +-
hw/ppc/pef.c | 9 +-
hw/ppc/spapr.c | 27 +-
hw/s390x/s390-virtio-ccw.c | 19 +-
stubs/usb-dev-stub.c => hw/usb/bus-stub.c | 5 -
.../virtio-md-pci.c => hw/virtio/virtio-md-stubs.c | 0
stubs/colo.c => migration/colo-stubs.c | 0
monitor/qemu-config-qmp.c | 206 ++++++
stubs/colo-compare.c => net/colo-stubs.c | 0
stubs/semihost-all.c => semihosting/stubs-all.c | 0
stubs/semihost.c => semihosting/stubs-system.c | 0
stubs/fdset.c | 6 +
{hw/core => stubs}/hotplug-stubs.c | 0
stubs/isa-bus.c | 7 -
stubs/module-opts.c | 2 -
stubs/monitor-core.c | 6 -
stubs/{monitor.c => monitor-internal.c} | 5 -
stubs/pci-bus.c | 7 -
stubs/qdev.c | 6 -
stubs/qtest.c | 10 -
stubs/replay-mode.c | 4 +
stubs/replay.c | 2 -
system/memory.c | 5 +
system/physmem.c | 65 +-
system/runstate.c | 15 +-
target/arm/kvm.c | 5 -
target/i386/confidential-guest.c | 33 +
target/i386/cpu.c | 175 +++++-
target/i386/host-cpu.c | 11 +-
target/i386/kvm/kvm-cpu.c | 50 +-
target/i386/kvm/kvm.c | 510 ++++++++-------
target/i386/kvm/sev-stub.c | 21 -
target/i386/sev.c | 178 ++++--
target/i386/tcg/translate.c | 14 +-
target/loongarch/kvm/kvm.c | 5 -
target/mips/kvm.c | 5 -
target/ppc/kvm.c | 5 -
target/riscv/kvm/kvm-cpu.c | 5 -
target/s390x/kvm/kvm.c | 5 -
target/s390x/kvm/pv.c | 10 +-
util/qemu-config.c | 204 +-----
accel/kvm/trace-events | 4 +-
ebpf/meson.build | 2 +-
hw/core/meson.build | 14 +-
hw/display/meson.build | 2 +-
hw/mem/meson.build | 1 +
hw/usb/meson.build | 2 +-
hw/virtio/meson.build | 2 +
migration/meson.build | 2 +
monitor/meson.build | 1 +
net/meson.build | 2 +
pythondeps.toml | 1 +
scripts/update-linux-headers.sh | 8 +-
semihosting/meson.build | 3 +
stubs/meson.build | 133 ++--
target/i386/kvm/meson.build | 2 -
target/i386/meson.build | 2 +-
tests/meson.build | 2 +-
tests/unit/meson.build | 12 +-
util/meson.build | 2 +-
129 files changed, 2786 insertions(+), 1617 deletions(-)
delete mode 100644 include/hw/ppc/pef.h
create mode 100644 include/standard-headers/asm-x86/setup_data.h
create mode 100644 linux-headers/linux/bits.h
create mode 100644 target/i386/confidential-guest.h
rename stubs/ramfb.c => hw/display/ramfb-stubs.c (100%)
rename stubs/memory_device.c => hw/mem/memory-device-stubs.c (100%)
rename stubs/usb-dev-stub.c => hw/usb/bus-stub.c (83%)
rename stubs/virtio-md-pci.c => hw/virtio/virtio-md-stubs.c (100%)
rename stubs/colo.c => migration/colo-stubs.c (100%)
create mode 100644 monitor/qemu-config-qmp.c
rename stubs/colo-compare.c => net/colo-stubs.c (100%)
rename stubs/semihost-all.c => semihosting/stubs-all.c (100%)
rename stubs/semihost.c => semihosting/stubs-system.c (100%)
rename {hw/core => stubs}/hotplug-stubs.c (100%)
delete mode 100644 stubs/isa-bus.c
delete mode 100644 stubs/module-opts.c
rename stubs/{monitor.c => monitor-internal.c} (79%)
delete mode 100644 stubs/pci-bus.c
create mode 100644 stubs/replay-mode.c
create mode 100644 target/i386/confidential-guest.c
delete mode 100644 target/i386/kvm/sev-stub.c
--
2.44.0
^ permalink raw reply [flat|nested] 6+ messages in thread* [PULL v2 25/63] i386/kvm: Move architectural CPUID leaf generation to separate helper 2024-04-24 8:14 [PULL v2 00/63] First batch of i386 and build system patch for QEMU 9.1 Paolo Bonzini @ 2024-04-24 8:14 ` Paolo Bonzini 2024-04-24 18:49 ` [PULL v2 00/63] First batch of i386 and build system patch for QEMU 9.1 Richard Henderson 1 sibling, 0 replies; 6+ messages in thread From: Paolo Bonzini @ 2024-04-24 8:14 UTC (permalink / raw) To: qemu-devel; +Cc: Sean Christopherson, Xiaoyao Li From: Sean Christopherson <sean.j.christopherson@intel.com> Move the architectural (for lack of a better term) CPUID leaf generation to a separate helper so that the generation code can be reused by TDX, which needs to generate a canonical VM-scoped configuration. For now this is just a cleanup, so keep the function static. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Message-ID: <20240229063726.610065-23-xiaoyao.li@intel.com> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> --- target/i386/kvm/kvm.c | 449 +++++++++++++++++++++--------------------- 1 file changed, 227 insertions(+), 222 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index e68cbe92930..f1b59011d1e 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -1706,6 +1706,231 @@ static void kvm_init_nested_state(CPUX86State *env) } } +static uint32_t kvm_x86_build_cpuid(CPUX86State *env, + struct kvm_cpuid_entry2 *entries, + uint32_t cpuid_i) +{ + uint32_t limit, i, j; + uint32_t unused; + struct kvm_cpuid_entry2 *c; + + cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused); + + for (i = 0; i <= limit; i++) { + j = 0; + if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { + goto full; + } + c = &entries[cpuid_i++]; + switch (i) { + case 2: { + /* Keep reading function 2 till all the input is received */ + int times; + + c->function = i; + c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC | + KVM_CPUID_FLAG_STATE_READ_NEXT; + cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); + times = c->eax & 0xff; + + for (j = 1; j < times; ++j) { + if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { + goto full; + } + c = &entries[cpuid_i++]; + c->function = i; + c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC; + cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); + } + break; + } + case 0x1f: + if (env->nr_dies < 2) { + cpuid_i--; + break; + } + /* fallthrough */ + case 4: + case 0xb: + case 0xd: + for (j = 0; ; j++) { + if (i == 0xd && j == 64) { + break; + } + + c->function = i; + c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX; + c->index = j; + cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx); + + if (i == 4 && c->eax == 0) { + break; + } + if (i == 0xb && !(c->ecx & 0xff00)) { + break; + } + if (i == 0x1f && !(c->ecx & 0xff00)) { + break; + } + if (i == 0xd && c->eax == 0) { + continue; + } + if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { + goto full; + } + c = &entries[cpuid_i++]; + } + break; + case 0x12: + for (j = 0; ; j++) { + c->function = i; + c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX; + c->index = j; + cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx); + + if (j > 1 && (c->eax & 0xf) != 1) { + break; + } + + if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { + goto full; + } + c = &entries[cpuid_i++]; + } + break; + case 0x7: + case 0x14: + case 0x1d: + case 0x1e: { + uint32_t times; + + c->function = i; + c->index = 0; + c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX; + cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); + times = c->eax; + + for (j = 1; j <= times; ++j) { + if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { + goto full; + } + c = &entries[cpuid_i++]; + c->function = i; + c->index = j; + c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX; + cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx); + } + break; + } + default: + c->function = i; + c->flags = 0; + cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); + if (!c->eax && !c->ebx && !c->ecx && !c->edx) { + /* + * KVM already returns all zeroes if a CPUID entry is missing, + * so we can omit it and avoid hitting KVM's 80-entry limit. + */ + cpuid_i--; + } + break; + } + } + + if (limit >= 0x0a) { + uint32_t eax, edx; + + cpu_x86_cpuid(env, 0x0a, 0, &eax, &unused, &unused, &edx); + + has_architectural_pmu_version = eax & 0xff; + if (has_architectural_pmu_version > 0) { + num_architectural_pmu_gp_counters = (eax & 0xff00) >> 8; + + /* Shouldn't be more than 32, since that's the number of bits + * available in EBX to tell us _which_ counters are available. + * Play it safe. + */ + if (num_architectural_pmu_gp_counters > MAX_GP_COUNTERS) { + num_architectural_pmu_gp_counters = MAX_GP_COUNTERS; + } + + if (has_architectural_pmu_version > 1) { + num_architectural_pmu_fixed_counters = edx & 0x1f; + + if (num_architectural_pmu_fixed_counters > MAX_FIXED_COUNTERS) { + num_architectural_pmu_fixed_counters = MAX_FIXED_COUNTERS; + } + } + } + } + + cpu_x86_cpuid(env, 0x80000000, 0, &limit, &unused, &unused, &unused); + + for (i = 0x80000000; i <= limit; i++) { + j = 0; + if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { + goto full; + } + c = &entries[cpuid_i++]; + + switch (i) { + case 0x8000001d: + /* Query for all AMD cache information leaves */ + for (j = 0; ; j++) { + c->function = i; + c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX; + c->index = j; + cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx); + + if (c->eax == 0) { + break; + } + if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { + goto full; + } + c = &entries[cpuid_i++]; + } + break; + default: + c->function = i; + c->flags = 0; + cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); + if (!c->eax && !c->ebx && !c->ecx && !c->edx) { + /* + * KVM already returns all zeroes if a CPUID entry is missing, + * so we can omit it and avoid hitting KVM's 80-entry limit. + */ + cpuid_i--; + } + break; + } + } + + /* Call Centaur's CPUID instructions they are supported. */ + if (env->cpuid_xlevel2 > 0) { + cpu_x86_cpuid(env, 0xC0000000, 0, &limit, &unused, &unused, &unused); + + for (i = 0xC0000000; i <= limit; i++) { + j = 0; + if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { + goto full; + } + c = &entries[cpuid_i++]; + + c->function = i; + c->flags = 0; + cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); + } + } + + return cpuid_i; + +full: + fprintf(stderr, "cpuid_data is full, no space for " + "cpuid(eax:0x%x,ecx:0x%x)\n", i, j); + abort(); +} + int kvm_arch_init_vcpu(CPUState *cs) { struct { @@ -1722,8 +1947,7 @@ int kvm_arch_init_vcpu(CPUState *cs) X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; - uint32_t limit, i, j, cpuid_i; - uint32_t unused; + uint32_t cpuid_i; struct kvm_cpuid_entry2 *c; uint32_t signature[3]; int kvm_base = KVM_CPUID_SIGNATURE; @@ -1876,8 +2100,6 @@ int kvm_arch_init_vcpu(CPUState *cs) c->edx = env->features[FEAT_KVM_HINTS]; } - cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused); - if (cpu->kvm_pv_enforce_cpuid) { r = kvm_vcpu_enable_cap(cs, KVM_CAP_ENFORCE_PV_FEATURE_CPUID, 0, 1); if (r < 0) { @@ -1888,224 +2110,7 @@ int kvm_arch_init_vcpu(CPUState *cs) } } - for (i = 0; i <= limit; i++) { - if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "unsupported level value: 0x%x\n", limit); - abort(); - } - c = &cpuid_data.entries[cpuid_i++]; - - switch (i) { - case 2: { - /* Keep reading function 2 till all the input is received */ - int times; - - c->function = i; - c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC | - KVM_CPUID_FLAG_STATE_READ_NEXT; - cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); - times = c->eax & 0xff; - - for (j = 1; j < times; ++j) { - if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "cpuid_data is full, no space for " - "cpuid(eax:2):eax & 0xf = 0x%x\n", times); - abort(); - } - c = &cpuid_data.entries[cpuid_i++]; - c->function = i; - c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC; - cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); - } - break; - } - case 0x1f: - if (env->nr_dies < 2) { - cpuid_i--; - break; - } - /* fallthrough */ - case 4: - case 0xb: - case 0xd: - for (j = 0; ; j++) { - if (i == 0xd && j == 64) { - break; - } - - c->function = i; - c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX; - c->index = j; - cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx); - - if (i == 4 && c->eax == 0) { - break; - } - if (i == 0xb && !(c->ecx & 0xff00)) { - break; - } - if (i == 0x1f && !(c->ecx & 0xff00)) { - break; - } - if (i == 0xd && c->eax == 0) { - continue; - } - if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "cpuid_data is full, no space for " - "cpuid(eax:0x%x,ecx:0x%x)\n", i, j); - abort(); - } - c = &cpuid_data.entries[cpuid_i++]; - } - break; - case 0x12: - for (j = 0; ; j++) { - c->function = i; - c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX; - c->index = j; - cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx); - - if (j > 1 && (c->eax & 0xf) != 1) { - break; - } - - if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "cpuid_data is full, no space for " - "cpuid(eax:0x12,ecx:0x%x)\n", j); - abort(); - } - c = &cpuid_data.entries[cpuid_i++]; - } - break; - case 0x7: - case 0x14: - case 0x1d: - case 0x1e: { - uint32_t times; - - c->function = i; - c->index = 0; - c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX; - cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); - times = c->eax; - - for (j = 1; j <= times; ++j) { - if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "cpuid_data is full, no space for " - "cpuid(eax:0x%x,ecx:0x%x)\n", i, j); - abort(); - } - c = &cpuid_data.entries[cpuid_i++]; - c->function = i; - c->index = j; - c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX; - cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx); - } - break; - } - default: - c->function = i; - c->flags = 0; - cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); - if (!c->eax && !c->ebx && !c->ecx && !c->edx) { - /* - * KVM already returns all zeroes if a CPUID entry is missing, - * so we can omit it and avoid hitting KVM's 80-entry limit. - */ - cpuid_i--; - } - break; - } - } - - if (limit >= 0x0a) { - uint32_t eax, edx; - - cpu_x86_cpuid(env, 0x0a, 0, &eax, &unused, &unused, &edx); - - has_architectural_pmu_version = eax & 0xff; - if (has_architectural_pmu_version > 0) { - num_architectural_pmu_gp_counters = (eax & 0xff00) >> 8; - - /* Shouldn't be more than 32, since that's the number of bits - * available in EBX to tell us _which_ counters are available. - * Play it safe. - */ - if (num_architectural_pmu_gp_counters > MAX_GP_COUNTERS) { - num_architectural_pmu_gp_counters = MAX_GP_COUNTERS; - } - - if (has_architectural_pmu_version > 1) { - num_architectural_pmu_fixed_counters = edx & 0x1f; - - if (num_architectural_pmu_fixed_counters > MAX_FIXED_COUNTERS) { - num_architectural_pmu_fixed_counters = MAX_FIXED_COUNTERS; - } - } - } - } - - cpu_x86_cpuid(env, 0x80000000, 0, &limit, &unused, &unused, &unused); - - for (i = 0x80000000; i <= limit; i++) { - if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "unsupported xlevel value: 0x%x\n", limit); - abort(); - } - c = &cpuid_data.entries[cpuid_i++]; - - switch (i) { - case 0x8000001d: - /* Query for all AMD cache information leaves */ - for (j = 0; ; j++) { - c->function = i; - c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX; - c->index = j; - cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx); - - if (c->eax == 0) { - break; - } - if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "cpuid_data is full, no space for " - "cpuid(eax:0x%x,ecx:0x%x)\n", i, j); - abort(); - } - c = &cpuid_data.entries[cpuid_i++]; - } - break; - default: - c->function = i; - c->flags = 0; - cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); - if (!c->eax && !c->ebx && !c->ecx && !c->edx) { - /* - * KVM already returns all zeroes if a CPUID entry is missing, - * so we can omit it and avoid hitting KVM's 80-entry limit. - */ - cpuid_i--; - } - break; - } - } - - /* Call Centaur's CPUID instructions they are supported. */ - if (env->cpuid_xlevel2 > 0) { - cpu_x86_cpuid(env, 0xC0000000, 0, &limit, &unused, &unused, &unused); - - for (i = 0xC0000000; i <= limit; i++) { - if (cpuid_i == KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "unsupported xlevel2 value: 0x%x\n", limit); - abort(); - } - c = &cpuid_data.entries[cpuid_i++]; - - c->function = i; - c->flags = 0; - cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); - } - } - + cpuid_i = kvm_x86_build_cpuid(env, cpuid_data.entries, cpuid_i); cpuid_data.cpuid.nent = cpuid_i; if (((env->cpuid_version >> 8)&0xF) >= 6 -- 2.44.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PULL v2 00/63] First batch of i386 and build system patch for QEMU 9.1 2024-04-24 8:14 [PULL v2 00/63] First batch of i386 and build system patch for QEMU 9.1 Paolo Bonzini 2024-04-24 8:14 ` [PULL v2 25/63] i386/kvm: Move architectural CPUID leaf generation to separate helper Paolo Bonzini @ 2024-04-24 18:49 ` Richard Henderson 2024-04-26 5:21 ` Paolo Bonzini 1 sibling, 1 reply; 6+ messages in thread From: Richard Henderson @ 2024-04-24 18:49 UTC (permalink / raw) To: Paolo Bonzini, qemu-devel On 4/24/24 01:14, Paolo Bonzini wrote: > The following changes since commit 62dbe54c24dbf77051bafe1039c31ddc8f37602d: > > Update version for v9.0.0-rc4 release (2024-04-16 18:06:15 +0100) > > are available in the Git repository at: > > https://gitlab.com/bonzini/qemu.git tags/for-upstream > > for you to fetch changes up to 7653b44534d3267fa63ebc9d7221eaa7b48bf5ae: > > target/i386/translate.c: always write 32-bits for SGDT and SIDT (2024-04-23 17:35:26 +0200) Sorry, I've already merged v1. You'll need to adjust the fix on top. r~ ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PULL v2 00/63] First batch of i386 and build system patch for QEMU 9.1 2024-04-24 18:49 ` [PULL v2 00/63] First batch of i386 and build system patch for QEMU 9.1 Richard Henderson @ 2024-04-26 5:21 ` Paolo Bonzini 2024-04-26 7:43 ` Zhao Liu 0 siblings, 1 reply; 6+ messages in thread From: Paolo Bonzini @ 2024-04-26 5:21 UTC (permalink / raw) To: Richard Henderson; +Cc: qemu-devel On Wed, Apr 24, 2024 at 8:49 PM Richard Henderson <richard.henderson@linaro.org> wrote: > > On 4/24/24 01:14, Paolo Bonzini wrote: > > The following changes since commit 62dbe54c24dbf77051bafe1039c31ddc8f37602d: > > > > Update version for v9.0.0-rc4 release (2024-04-16 18:06:15 +0100) > > > > are available in the Git repository at: > > > > https://gitlab.com/bonzini/qemu.git tags/for-upstream > > > > for you to fetch changes up to 7653b44534d3267fa63ebc9d7221eaa7b48bf5ae: > > > > target/i386/translate.c: always write 32-bits for SGDT and SIDT (2024-04-23 17:35:26 +0200) > > Sorry, I've already merged v1. You'll need to adjust the fix on top. It's the same tag, so you actually merged v2. Paolo ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PULL v2 00/63] First batch of i386 and build system patch for QEMU 9.1 2024-04-26 5:21 ` Paolo Bonzini @ 2024-04-26 7:43 ` Zhao Liu 2024-04-26 9:43 ` Zhao Liu 0 siblings, 1 reply; 6+ messages in thread From: Zhao Liu @ 2024-04-26 7:43 UTC (permalink / raw) To: Paolo Bonzini; +Cc: Richard Henderson, qemu-devel Hi Paolo, On Fri, Apr 26, 2024 at 07:21:12AM +0200, Paolo Bonzini wrote: > Date: Fri, 26 Apr 2024 07:21:12 +0200 > From: Paolo Bonzini <pbonzini@redhat.com> > Subject: Re: [PULL v2 00/63] First batch of i386 and build system patch for > QEMU 9.1 > > On Wed, Apr 24, 2024 at 8:49 PM Richard Henderson > <richard.henderson@linaro.org> wrote: > > > > On 4/24/24 01:14, Paolo Bonzini wrote: > > > The following changes since commit 62dbe54c24dbf77051bafe1039c31ddc8f37602d: > > > > > > Update version for v9.0.0-rc4 release (2024-04-16 18:06:15 +0100) > > > > > > are available in the Git repository at: > > > > > > https://gitlab.com/bonzini/qemu.git tags/for-upstream > > > > > > for you to fetch changes up to 7653b44534d3267fa63ebc9d7221eaa7b48bf5ae: > > > > > > target/i386/translate.c: always write 32-bits for SGDT and SIDT (2024-04-23 17:35:26 +0200) > > > > Sorry, I've already merged v1. You'll need to adjust the fix on top. > > It's the same tag, so you actually merged v2. The difference between v2 and v1 is about fixing two of Xiaoyao's comments, right? Currently in master, luckly the CPUID fix [1] has landed, but another comment fix [2] hasn't land. So Richard merged v1 and helped fix [1], [2] did not catch up with v1 merge window. ;-( I have a misc kvm cleanup series coming up soon that I can also include [2]'s fix there. [1]: https://lore.kernel.org/qemu-devel/b9043b52-5fdf-4349-8a56-c1418feb1bbd@intel.com/ [2]: https://lore.kernel.org/qemu-devel/2815f0f1-9e20-4985-849c-d74c6cdc94ae@intel.com/ Regards, Zhao ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PULL v2 00/63] First batch of i386 and build system patch for QEMU 9.1 2024-04-26 7:43 ` Zhao Liu @ 2024-04-26 9:43 ` Zhao Liu 0 siblings, 0 replies; 6+ messages in thread From: Zhao Liu @ 2024-04-26 9:43 UTC (permalink / raw) To: Paolo Bonzini; +Cc: Richard Henderson, qemu-devel On Fri, Apr 26, 2024 at 03:43:15PM +0800, Zhao Liu wrote: > Date: Fri, 26 Apr 2024 15:43:15 +0800 > From: Zhao Liu <zhao1.liu@intel.com> > Subject: Re: [PULL v2 00/63] First batch of i386 and build system patch for > QEMU 9.1 > > Hi Paolo, > > On Fri, Apr 26, 2024 at 07:21:12AM +0200, Paolo Bonzini wrote: > > Date: Fri, 26 Apr 2024 07:21:12 +0200 > > From: Paolo Bonzini <pbonzini@redhat.com> > > Subject: Re: [PULL v2 00/63] First batch of i386 and build system patch for > > QEMU 9.1 > > > > On Wed, Apr 24, 2024 at 8:49 PM Richard Henderson > > <richard.henderson@linaro.org> wrote: > > > > > > On 4/24/24 01:14, Paolo Bonzini wrote: > > > > The following changes since commit 62dbe54c24dbf77051bafe1039c31ddc8f37602d: > > > > > > > > Update version for v9.0.0-rc4 release (2024-04-16 18:06:15 +0100) > > > > > > > > are available in the Git repository at: > > > > > > > > https://gitlab.com/bonzini/qemu.git tags/for-upstream > > > > > > > > for you to fetch changes up to 7653b44534d3267fa63ebc9d7221eaa7b48bf5ae: > > > > > > > > target/i386/translate.c: always write 32-bits for SGDT and SIDT (2024-04-23 17:35:26 +0200) > > > > > > Sorry, I've already merged v1. You'll need to adjust the fix on top. > > > > It's the same tag, so you actually merged v2. > > The difference between v2 and v1 is about fixing two of Xiaoyao's > comments, right? > > Currently in master, luckly the CPUID fix [1] has landed, but another > comment fix [2] hasn't land. So Richard merged v1 and helped fix [1], > [2] did not catch up with v1 merge window. ;-( I misunderstood this and rechecked v2, which also doesn't contain [2]. > I have a misc kvm cleanup series coming up soon that I can also include > [2]'s fix there. > > [1]: https://lore.kernel.org/qemu-devel/b9043b52-5fdf-4349-8a56-c1418feb1bbd@intel.com/ > [2]: https://lore.kernel.org/qemu-devel/2815f0f1-9e20-4985-849c-d74c6cdc94ae@intel.com/ > ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-04-26 9:30 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-04-24 8:14 [PULL v2 00/63] First batch of i386 and build system patch for QEMU 9.1 Paolo Bonzini 2024-04-24 8:14 ` [PULL v2 25/63] i386/kvm: Move architectural CPUID leaf generation to separate helper Paolo Bonzini 2024-04-24 18:49 ` [PULL v2 00/63] First batch of i386 and build system patch for QEMU 9.1 Richard Henderson 2024-04-26 5:21 ` Paolo Bonzini 2024-04-26 7:43 ` Zhao Liu 2024-04-26 9:43 ` Zhao Liu
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