From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Alex Bennée" <alex.bennee@linaro.org>
Subject: Re: [Qemu-devel] [RISU PATCH] arm.risu: Avoid VTRN with Vd == Vm
Date: Thu, 13 Jun 2019 14:17:37 -0700 [thread overview]
Message-ID: <724331ba-44ee-c37c-e22b-452b6f25ee7b@linaro.org> (raw)
In-Reply-To: <20190613143741.15128-1-peter.maydell@linaro.org>
On 6/13/19 7:37 AM, Peter Maydell wrote:
> The AArch32 VTRN instruction is specified to give an UNKNOWN
> result if Vd and Vm are the same register; avoid generating
> this in risu output, as we already do for VUZP and VZIP.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> Alex: this pattern error is why we don't pass your
> testcases/aarch32-all/insn_VTRN__INC.risu.bin when compared
> with a real Cortex-A7. You probably want to update that.
>
> arm.risu | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2019-06-13 21:20 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-13 14:37 [Qemu-devel] [RISU PATCH] arm.risu: Avoid VTRN with Vd == Vm Peter Maydell
2019-06-13 21:17 ` Richard Henderson [this message]
2019-06-17 14:24 ` Peter Maydell
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