From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "QEMU Developers" <qemu-devel@nongnu.org>,
"Alex Bennée" <alex.bennee@linaro.org>
Subject: Re: [Qemu-devel] [PATCH] target/arm: Conditionalize arm_div assert on aarch32 support
Date: Fri, 2 Nov 2018 09:50:28 +0000 [thread overview]
Message-ID: <72f81077-d400-31b5-0e6f-fb59a4bbae53@linaro.org> (raw)
In-Reply-To: <CAFEAcA_HrcAfHaLW+hT0btN6C=GZv7VYWmhz3ri-QSL9ySZ0qg@mail.gmail.com>
On 11/2/18 9:48 AM, Peter Maydell wrote:
>> +static inline bool isar_feature_aa64_a32(const ARMISARegisters *id)
>> +{
>> + return FIELD_EX64(id->id_aa64pfr0, ID_AA64PFR0, EL0) == 2;
>> +}
>> +
>
> Doesn't the stuff in the Arm ARM's "Principles of the ID
> scheme for fields in ID registers" about signed and unsigned
> values for ID register fields strictly mean you want to be
> testing (unsigned) >= 2 here rather than strict equality?
Yes. Will fix.
r~
prev parent reply other threads:[~2018-11-02 9:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-01 21:57 [Qemu-devel] [PATCH] target/arm: Conditionalize arm_div assert on aarch32 support Richard Henderson
2018-11-02 0:16 ` Philippe Mathieu-Daudé
2018-11-02 7:58 ` Alex Bennée
2018-11-02 9:48 ` Peter Maydell
2018-11-02 9:50 ` Richard Henderson [this message]
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