From: Richard Henderson <richard.henderson@linaro.org>
To: Alistair Francis <alistair.francis@opensource.wdc.com>,
qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: Bin Meng <bin.meng@windriver.com>,
palmer@dabbelt.com, bmeng.cn@gmail.com,
Alistair Francis <alistair.francis@wdc.com>,
alistair23@gmail.com
Subject: Re: [PATCH v2 2/2] target/riscv: Allow software access to MIP SEIP
Date: Tue, 15 Mar 2022 23:13:45 -0700 [thread overview]
Message-ID: <733b5d86-a577-3486-57ff-aca581db6ff5@linaro.org> (raw)
In-Reply-To: <20220316015901.3787779-3-alistair.francis@opensource.wdc.com>
On 3/15/22 18:59, Alistair Francis wrote:
> + if (mask & MIP_SEIP) {
> + env->software_seip = new_val & MIP_SEIP;
> + }
> + new_val |= env->external_seip << IRQ_S_EXT;
You can move the second statement inside the if as well, since you don't need bits in
new_val set that are not in mask.
Also might be clearer as
env->external_seip * MIP_SEIP
rather than the shift, to make it clear we're talking about the same bit. The compiler
will reduce the multiplication.
Otherwise,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
prev parent reply other threads:[~2022-03-16 6:19 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-16 1:58 [PATCH v2 0/2] target/riscv: Allow software access to MIP SEIP Alistair Francis
2022-03-16 1:59 ` [PATCH v2 1/2] target/riscv: cpu: Fixup indentation Alistair Francis
2022-03-16 6:15 ` Richard Henderson
2022-03-16 1:59 ` [PATCH v2 2/2] target/riscv: Allow software access to MIP SEIP Alistair Francis
2022-03-16 6:13 ` Richard Henderson [this message]
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