From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1HTHyS-0004Vz-U7 for qemu-devel@nongnu.org; Mon, 19 Mar 2007 09:32:32 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1HTHyS-0004Tj-6Z for qemu-devel@nongnu.org; Mon, 19 Mar 2007 09:32:32 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1HTHyS-0004TK-1M for qemu-devel@nongnu.org; Mon, 19 Mar 2007 08:32:32 -0500 Received: from eastrmmtao102.cox.net ([68.230.240.8]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1HTHwz-0008VQ-AO for qemu-devel@nongnu.org; Mon, 19 Mar 2007 09:31:01 -0400 Received: from eastrmimpo01.cox.net ([68.1.16.119]) by eastrmmtao102.cox.net (InterMail vM.7.05.02.00 201-2174-114-20060621) with ESMTP id <20070319133102.MWDR2213.eastrmmtao102.cox.net@eastrmimpo01.cox.net> for ; Mon, 19 Mar 2007 09:31:02 -0400 Message-ID: <7369890.1174311061508.JavaMail.root@eastrmwml08.cox.net> Date: Mon, 19 Mar 2007 9:31:01 -0400 From: Ben Taylor MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_Part_17047_9400910.1174311061378" Subject: [Qemu-devel] PATCH: arm, mips and sparc targets on Host Solaris/sparc Reply-To: sol10x86@cox.net, qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Qemu-devel@nongnu.org ------=_Part_17047_9400910.1174311061378 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit This patch is to fix (correctly) running mips, sparc and arm targets on a Solaris/Sparc host. This patch reverts the patch posted February 2nd, 2007, (found at http://lists.gnu.org/archive/html/qemu-devel/2007-02/msg00008.html for reference). Juergen Keil found that config.h was not included in target-arm/exec.h and config.h was included *after* dyngen-exec.h in target-sparc/exec.h. By config.h not being included before dyngen-exec.h, the code in dyngen-exec.h assumed a linux-sparc host and used different register allocations which were incompatible with Solaris/Sparc. I can boot the sparc-test and mips-tests now. The arm-test is not functional due a Solaris library bug, and we are working on a fix. Ben ------=_Part_17047_9400910.1174311061378 Content-Type: text/x-patch; name=qemu-arm-mips-sparc.diff Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename=qemu-arm-mips-sparc.diff diff -ruN qemu-ORIG/target-arm/exec.h qemu/target-arm/exec.h --- qemu-ORIG/target-arm/exec.h 2007-02-01 20:03:34.000000000 -0500 +++ qemu/target-arm/exec.h 2007-03-19 09:19:44.330960000 -0400 @@ -17,19 +17,13 @@ * License along with this library; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ +#include "config.h" #include "dyngen-exec.h" -#if defined(__sparc__) -struct CPUARMState *env; -uint32_t T0; -uint32_t T1; -uint32_t T2; -#else register struct CPUARMState *env asm(AREG0); register uint32_t T0 asm(AREG1); register uint32_t T1 asm(AREG2); register uint32_t T2 asm(AREG3); -#endif /* TODO: Put these in FP regs on targets that have such things. */ /* It is ok for FT0s and FT0d to overlap. Likewise FT1s and FT1d. */ diff -ruN qemu-ORIG/target-mips/exec.h qemu/target-mips/exec.h --- qemu-ORIG/target-mips/exec.h 2007-02-28 17:37:42.000000000 -0500 +++ qemu/target-mips/exec.h 2007-03-19 09:20:30.439432000 -0400 @@ -7,11 +7,7 @@ #include "mips-defs.h" #include "dyngen-exec.h" -#if defined(__sparc__) -struct CPUMIPSState *env; -#else register struct CPUMIPSState *env asm(AREG0); -#endif #if defined (USE_64BITS_REGS) typedef int64_t host_int_t; @@ -21,11 +17,6 @@ typedef uint32_t host_uint_t; #endif -#if defined(__sparc__) -host_uint_t T0; -host_uint_t T1; -host_uint_t T2; -#else #if TARGET_LONG_BITS > HOST_LONG_BITS #define T0 (env->t0) #define T1 (env->t1) @@ -35,7 +26,6 @@ register host_uint_t T1 asm(AREG2); register host_uint_t T2 asm(AREG3); #endif -#endif #if defined (USE_HOST_FLOAT_REGS) #error "implement me." diff -ruN qemu-ORIG/target-sparc/exec.h qemu/target-sparc/exec.h --- qemu-ORIG/target-sparc/exec.h 2007-02-01 20:03:34.000000000 -0500 +++ qemu/target-sparc/exec.h 2007-03-19 09:22:48.763910000 -0400 @@ -3,11 +3,7 @@ #include "dyngen-exec.h" #include "config.h" -#if defined(__sparc__) -struct CPUSPARCState *env; -#else register struct CPUSPARCState *env asm(AREG0); -#endif #ifdef TARGET_SPARC64 #define T0 (env->t0) @@ -15,13 +11,8 @@ #define T2 (env->t2) #define REGWPTR env->regwptr #else -#if defined(__sparc__) -register uint32_t T0 asm(AREG3); -register uint32_t T1 asm(AREG2); -#else register uint32_t T0 asm(AREG1); register uint32_t T1 asm(AREG2); -#endif #undef REG_REGWPTR // Broken #ifdef REG_REGWPTR @@ -33,11 +24,7 @@ #define reg_REGWPTR #ifdef AREG4 -#if defined(__sparc__) -register uint32_t T2 asm(AREG0); -#else register uint32_t T2 asm(AREG4); -#endif #define reg_T2 #else #define T2 (env->t2) @@ -45,14 +32,10 @@ #else #define REGWPTR env->regwptr -#if defined(__sparc__) -register uint32_t T2 asm(AREG0); -#else register uint32_t T2 asm(AREG3); #endif #define reg_T2 #endif -#endif #define FT0 (env->ft0) #define FT1 (env->ft1) ------=_Part_17047_9400910.1174311061378--