From: Richard Henderson <richard.henderson@linaro.org>
To: Daniel Henrique Barboza <danielhb413@gmail.com>, qemu-devel@nongnu.org
Cc: david@gibson.dropbear.id.au, qemu-ppc@nongnu.org
Subject: Re: [PATCH for-8.0 1/1] target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCX
Date: Mon, 21 Nov 2022 14:53:17 -0800 [thread overview]
Message-ID: <744b2570-180f-1b72-44a2-3391c2d629c0@linaro.org> (raw)
In-Reply-To: <f456f0e6-e69a-bda3-f2ee-7e4d4b7c8cd4@gmail.com>
On 11/21/22 14:37, Daniel Henrique Barboza wrote:
>
>
> On 11/12/22 03:11, Richard Henderson wrote:
>> Note that the previous direct reference to reserve_val,
>>
>> - tcg_gen_ld_i64(t1, cpu_env, (ctx->le_mode
>> - ? offsetof(CPUPPCState, reserve_val2)
>> - : offsetof(CPUPPCState, reserve_val)));
>>
>> was incorrect because all references should have gone through
>> cpu_reserve_val. Create a cpu_reserve_val2 tcg temp to fix this.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>
> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
>
>
> Richard, since this depends on your int128 with helpers, do you want to
> queue this in the same queue?
I certainly can. Thanks,
r~
prev parent reply other threads:[~2022-11-21 22:54 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-12 6:11 [PATCH for-8.0 0/1] target/ppc: Use tcg_gen_atomic_cmpxchg_i128 Richard Henderson
2022-11-12 6:11 ` [PATCH for-8.0 1/1] target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCX Richard Henderson
2022-11-16 13:38 ` Daniel Henrique Barboza
2022-11-17 2:48 ` Richard Henderson
2022-11-17 10:03 ` Daniel Henrique Barboza
2022-11-21 22:37 ` Daniel Henrique Barboza
2022-11-21 22:53 ` Richard Henderson [this message]
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