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([2602:47:d48a:1201:dd04:f222:eac3:5b54]) by smtp.gmail.com with ESMTPSA id e22-20020a635456000000b00477078686a9sm7995129pgm.42.2022.11.21.14.53.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 21 Nov 2022 14:53:19 -0800 (PST) Message-ID: <744b2570-180f-1b72-44a2-3391c2d629c0@linaro.org> Date: Mon, 21 Nov 2022 14:53:17 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH for-8.0 1/1] target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCX Content-Language: en-US To: Daniel Henrique Barboza , qemu-devel@nongnu.org Cc: david@gibson.dropbear.id.au, qemu-ppc@nongnu.org References: <20221112061122.2720163-1-richard.henderson@linaro.org> <20221112061122.2720163-2-richard.henderson@linaro.org> From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 11/21/22 14:37, Daniel Henrique Barboza wrote: > > > On 11/12/22 03:11, Richard Henderson wrote: >> Note that the previous direct reference to reserve_val, >> >> -   tcg_gen_ld_i64(t1, cpu_env, (ctx->le_mode >> -                                ? offsetof(CPUPPCState, reserve_val2) >> -                                : offsetof(CPUPPCState, reserve_val))); >> >> was incorrect because all references should have gone through >> cpu_reserve_val.  Create a cpu_reserve_val2 tcg temp to fix this. >> >> Signed-off-by: Richard Henderson >> --- > > Reviewed-by: Daniel Henrique Barboza > > > Richard, since this depends on your int128 with helpers, do you want to > queue this in the same queue? I certainly can. Thanks, r~