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([2a01:e0a:59e:9d80:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id y21-20020a05620a44d500b0078ecd71114dsm413360qkp.69.2024.04.18.00.56.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 18 Apr 2024 00:56:21 -0700 (PDT) Message-ID: <74b42fab-7731-4826-974f-dec9f0413b7d@redhat.com> Date: Thu, 18 Apr 2024 09:56:18 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v2 03/13] hw/arm/smmu: Consolidate ASID and VMID types Content-Language: en-US To: Mostafa Saleh , qemu-arm@nongnu.org, peter.maydell@linaro.org, qemu-devel@nongnu.org Cc: jean-philippe@linaro.org, alex.bennee@linaro.org, maz@kernel.org, nicolinc@nvidia.com, julien@xen.org, richard.henderson@linaro.org, marcin.juszkiewicz@linaro.org References: <20240408140818.3799590-1-smostafa@google.com> <20240408140818.3799590-4-smostafa@google.com> From: Eric Auger In-Reply-To: <20240408140818.3799590-4-smostafa@google.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -37 X-Spam_score: -3.8 X-Spam_bar: --- X-Spam_report: (-3.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.719, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Mostafa, On 4/8/24 16:08, Mostafa Saleh wrote: > ASID and VMID used to be uint16_t in the translation config, however, > in other contexts they can be int as -1 in case of TLB invalidation, > to represent all(don’t care). > When stage-2 was added asid was set to -1 in stage-2 and vmid to -1 > in stage-1 configs. However, that meant they were set as (65536), > this was not an issue as nesting was not supported and no > commands/lookup targets both. > > With nesting, it’s critical to get this right as translation must be > tagged correctly with ASID/VMID, and with ASID=-1 meaning stage-2. > Represent ASID/VMID everywhere as int. small conflict  due to 0b796f3810  hw/arm/smmu: Avoid using inlined functions with external linkage again Besides Reviewed-by: Eric Auger Eric > > Signed-off-by: Mostafa Saleh > --- > hw/arm/smmu-common.c | 10 +++++----- > hw/arm/smmuv3.c | 4 ++-- > include/hw/arm/smmu-common.h | 14 +++++++------- > 3 files changed, 14 insertions(+), 14 deletions(-) > > diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c > index 20630eb670..771b9c79a3 100644 > --- a/hw/arm/smmu-common.c > +++ b/hw/arm/smmu-common.c > @@ -57,7 +57,7 @@ static gboolean smmu_iotlb_key_equal(gconstpointer v1, gconstpointer v2) > (k1->vmid == k2->vmid); > } > > -SMMUIOTLBKey smmu_get_iotlb_key(uint16_t asid, uint16_t vmid, uint64_t iova, > +SMMUIOTLBKey smmu_get_iotlb_key(int asid, int vmid, uint64_t iova, > uint8_t tg, uint8_t level) > { > SMMUIOTLBKey key = {.asid = asid, .vmid = vmid, .iova = iova, > @@ -130,7 +130,7 @@ void smmu_iotlb_inv_all(SMMUState *s) > static gboolean smmu_hash_remove_by_asid(gpointer key, gpointer value, > gpointer user_data) > { > - uint16_t asid = *(uint16_t *)user_data; > + int asid = *(int *)user_data; > SMMUIOTLBKey *iotlb_key = (SMMUIOTLBKey *)key; > > return SMMU_IOTLB_ASID(*iotlb_key) == asid; > @@ -139,7 +139,7 @@ static gboolean smmu_hash_remove_by_asid(gpointer key, gpointer value, > static gboolean smmu_hash_remove_by_vmid(gpointer key, gpointer value, > gpointer user_data) > { > - uint16_t vmid = *(uint16_t *)user_data; > + int vmid = *(int *)user_data; > SMMUIOTLBKey *iotlb_key = (SMMUIOTLBKey *)key; > > return SMMU_IOTLB_VMID(*iotlb_key) == vmid; > @@ -191,13 +191,13 @@ void smmu_iotlb_inv_iova(SMMUState *s, int asid, int vmid, dma_addr_t iova, > &info); > } > > -void smmu_iotlb_inv_asid(SMMUState *s, uint16_t asid) > +void smmu_iotlb_inv_asid(SMMUState *s, int asid) > { > trace_smmu_iotlb_inv_asid(asid); > g_hash_table_foreach_remove(s->iotlb, smmu_hash_remove_by_asid, &asid); > } > > -inline void smmu_iotlb_inv_vmid(SMMUState *s, uint16_t vmid) > +inline void smmu_iotlb_inv_vmid(SMMUState *s, int vmid) > { > trace_smmu_iotlb_inv_vmid(vmid); > g_hash_table_foreach_remove(s->iotlb, smmu_hash_remove_by_vmid, &vmid); > diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c > index f081ff0cc4..897f8fe085 100644 > --- a/hw/arm/smmuv3.c > +++ b/hw/arm/smmuv3.c > @@ -1235,7 +1235,7 @@ static int smmuv3_cmdq_consume(SMMUv3State *s) > } > case SMMU_CMD_TLBI_NH_ASID: > { > - uint16_t asid = CMD_ASID(&cmd); > + int asid = CMD_ASID(&cmd); > > if (!STAGE1_SUPPORTED(s)) { > cmd_error = SMMU_CERROR_ILL; > @@ -1268,7 +1268,7 @@ static int smmuv3_cmdq_consume(SMMUv3State *s) > break; > case SMMU_CMD_TLBI_S12_VMALL: > { > - uint16_t vmid = CMD_VMID(&cmd); > + int vmid = CMD_VMID(&cmd); > > if (!STAGE2_SUPPORTED(s)) { > cmd_error = SMMU_CERROR_ILL; > diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h > index 5944735632..96eb017e50 100644 > --- a/include/hw/arm/smmu-common.h > +++ b/include/hw/arm/smmu-common.h > @@ -84,7 +84,7 @@ typedef struct SMMUS2Cfg { > bool record_faults; /* Record fault events (S2R) */ > uint8_t granule_sz; /* Granule page shift (based on S2TG) */ > uint8_t eff_ps; /* Effective PA output range (based on S2PS) */ > - uint16_t vmid; /* Virtual Machine ID (S2VMID) */ > + int vmid; /* Virtual Machine ID (S2VMID) */ > uint64_t vttb; /* Address of translation table base (S2TTB) */ > } SMMUS2Cfg; > > @@ -108,7 +108,7 @@ typedef struct SMMUTransCfg { > uint64_t ttb; /* TT base address */ > uint8_t oas; /* output address width */ > uint8_t tbi; /* Top Byte Ignore */ > - uint16_t asid; > + int asid; > SMMUTransTableInfo tt[2]; > /* Used by stage-2 only. */ > struct SMMUS2Cfg s2cfg; > @@ -132,8 +132,8 @@ typedef struct SMMUPciBus { > > typedef struct SMMUIOTLBKey { > uint64_t iova; > - uint16_t asid; > - uint16_t vmid; > + int asid; > + int vmid; > uint8_t tg; > uint8_t level; > } SMMUIOTLBKey; > @@ -205,11 +205,11 @@ IOMMUMemoryRegion *smmu_iommu_mr(SMMUState *s, uint32_t sid); > SMMUTLBEntry *smmu_iotlb_lookup(SMMUState *bs, SMMUTransCfg *cfg, > SMMUTransTableInfo *tt, hwaddr iova); > void smmu_iotlb_insert(SMMUState *bs, SMMUTransCfg *cfg, SMMUTLBEntry *entry); > -SMMUIOTLBKey smmu_get_iotlb_key(uint16_t asid, uint16_t vmid, uint64_t iova, > +SMMUIOTLBKey smmu_get_iotlb_key(int asid, int vmid, uint64_t iova, > uint8_t tg, uint8_t level); > void smmu_iotlb_inv_all(SMMUState *s); > -void smmu_iotlb_inv_asid(SMMUState *s, uint16_t asid); > -void smmu_iotlb_inv_vmid(SMMUState *s, uint16_t vmid); > +void smmu_iotlb_inv_asid(SMMUState *s, int asid); > +void smmu_iotlb_inv_vmid(SMMUState *s, int vmid); > void smmu_iotlb_inv_iova(SMMUState *s, int asid, int vmid, dma_addr_t iova, > uint8_t tg, uint64_t num_pages, uint8_t ttl); >