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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec1663060sm32408305e9.14.2025.04.03.14.29.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 03 Apr 2025 14:29:41 -0700 (PDT) Message-ID: <74e250b5-3fb2-4688-ac20-18be6b6173f1@linaro.org> Date: Thu, 3 Apr 2025 23:29:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH-for-10.1 01/43] tcg: Declare TARGET_INSN_START_EXTRA_WORDS in 'cpu-param.h' From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= To: Richard Henderson , qemu-devel@nongnu.org References: <20250402210328.52897-1-philmd@linaro.org> <20250402210328.52897-2-philmd@linaro.org> Content-Language: en-US In-Reply-To: <20250402210328.52897-2-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 2/4/25 23:02, Philippe Mathieu-Daudé wrote: > To avoid including the huge "cpu.h" for a simple definition, > move TARGET_INSN_START_EXTRA_WORDS to "cpu-param.h". > > Reviewed-by: Richard Henderson > Signed-off-by: Philippe Mathieu-Daudé > --- > target/arm/cpu-param.h | 7 +++++++ > target/arm/cpu.h | 6 ------ > target/hppa/cpu-param.h | 2 ++ > target/hppa/cpu.h | 2 -- > target/i386/cpu-param.h | 2 ++ > target/i386/cpu.h | 2 -- > target/m68k/cpu-param.h | 2 ++ > target/m68k/cpu.h | 2 -- > target/microblaze/cpu-param.h | 2 ++ > target/microblaze/cpu.h | 2 -- > target/mips/cpu-param.h | 2 ++ > target/mips/cpu.h | 2 -- > target/openrisc/cpu-param.h | 2 ++ > target/openrisc/cpu.h | 2 -- > target/riscv/cpu-param.h | 8 ++++++++ > target/riscv/cpu.h | 6 ------ > target/s390x/cpu-param.h | 2 ++ > target/s390x/cpu.h | 2 -- > target/sh4/cpu-param.h | 2 ++ > target/sh4/cpu.h | 2 -- > target/sparc/cpu-param.h | 2 ++ > target/sparc/cpu.h | 1 - > 22 files changed, 33 insertions(+), 29 deletions(-) Missing: -- >8 -- diff --git a/include/tcg/insn-start-words.h b/include/tcg/insn-start-words.h index 394c191da8d..d416d19bcf9 100644 --- a/include/tcg/insn-start-words.h +++ b/include/tcg/insn-start-words.h @@ -8,3 +8,3 @@ -#include "cpu.h" +#include "cpu-param.h" --- > > diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h > index a7ae42d17dc..2cee4be6938 100644 > --- a/target/arm/cpu-param.h > +++ b/target/arm/cpu-param.h > @@ -37,6 +37,13 @@ > # define TARGET_PAGE_BITS_LEGACY 10 > #endif /* !CONFIG_USER_ONLY */ > > +/* > + * ARM-specific extra insn start words: > + * 1: Conditional execution bits > + * 2: Partial exception syndrome for data aborts > + */ > +#define TARGET_INSN_START_EXTRA_WORDS 2 > + > /* ARM processors have a weak memory model */ > #define TCG_GUEST_DEFAULT_MO (0) > ...