* [PATCH v2 1/3] hw/arm: Add EHCI/OHCI controllers to Allwinner R40 and Bananapi board
2024-01-15 18:27 [PATCH v2 0/3] hw/arm: Add support for USB, SATA, and watchdog to Allwinner R40 Guenter Roeck
@ 2024-01-15 18:27 ` Guenter Roeck
2024-01-16 9:56 ` Philippe Mathieu-Daudé
2024-01-15 18:27 ` [PATCH v2 2/3] hw/arm: Add AHCI/SATA controller " Guenter Roeck
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: Guenter Roeck @ 2024-01-15 18:27 UTC (permalink / raw)
To: Peter Maydell
Cc: Paolo Bonzini, Beniamino Galvani, Strahinja Jankovic, qemu-devel,
qemu-arm, Guenter Roeck
Allwinner R40 supports two USB host ports shared between a USB 2.0 EHCI
host controller and a USB 1.1 OHCI host controller. Add support for both
of them.
If machine USB support is not enabled, create unimplemented devices
for the USB memory ranges to avoid crashes when booting Linux.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
v2: The USB Controllers are part of the chipset, so instantiate them
unconditionally
docs/system/arm/bananapi_m2u.rst | 2 +-
hw/arm/Kconfig | 2 ++
hw/arm/allwinner-r40.c | 47 ++++++++++++++++++++++++++++++--
include/hw/arm/allwinner-r40.h | 9 ++++++
4 files changed, 57 insertions(+), 3 deletions(-)
diff --git a/docs/system/arm/bananapi_m2u.rst b/docs/system/arm/bananapi_m2u.rst
index b09ba5c548..e77c425e2c 100644
--- a/docs/system/arm/bananapi_m2u.rst
+++ b/docs/system/arm/bananapi_m2u.rst
@@ -23,6 +23,7 @@ The Banana Pi M2U machine supports the following devices:
* GMAC ethernet
* Clock Control Unit
* TWI (I2C)
+ * USB 2.0
Limitations
"""""""""""
@@ -33,7 +34,6 @@ Currently, Banana Pi M2U does *not* support the following features:
- Audio output
- Hardware Watchdog
- Real Time Clock
-- USB 2.0 interfaces
Also see the 'unimplemented' array in the Allwinner R40 SoC module
for a complete list of unimplemented I/O devices: ``./hw/arm/allwinner-r40.c``
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 39d255425b..6b508780d3 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -415,6 +415,8 @@ config ALLWINNER_R40
select ARM_TIMER
select ARM_GIC
select UNIMP
+ select USB_OHCI
+ select USB_EHCI_SYSBUS
select SD
config RASPI
diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c
index a0d367c60d..2e8943eff7 100644
--- a/hw/arm/allwinner-r40.c
+++ b/hw/arm/allwinner-r40.c
@@ -23,6 +23,7 @@
#include "qemu/bswap.h"
#include "qemu/module.h"
#include "qemu/units.h"
+#include "hw/boards.h"
#include "hw/qdev-core.h"
#include "hw/sysbus.h"
#include "hw/char/serial.h"
@@ -45,6 +46,10 @@ const hwaddr allwinner_r40_memmap[] = {
[AW_R40_DEV_MMC1] = 0x01c10000,
[AW_R40_DEV_MMC2] = 0x01c11000,
[AW_R40_DEV_MMC3] = 0x01c12000,
+ [AW_R40_DEV_EHCI1] = 0x01c19000,
+ [AW_R40_DEV_OHCI1] = 0x01c19400,
+ [AW_R40_DEV_EHCI2] = 0x01c1c000,
+ [AW_R40_DEV_OHCI2] = 0x01c1c400,
[AW_R40_DEV_CCU] = 0x01c20000,
[AW_R40_DEV_PIT] = 0x01c20c00,
[AW_R40_DEV_UART0] = 0x01c28000,
@@ -89,9 +94,9 @@ static struct AwR40Unimplemented r40_unimplemented[] = {
{ "crypto", 0x01c15000, 4 * KiB },
{ "spi2", 0x01c17000, 4 * KiB },
{ "sata", 0x01c18000, 4 * KiB },
- { "usb1-host", 0x01c19000, 4 * KiB },
+ { "usb1-phy", 0x01c19800, 2 * KiB },
{ "sid", 0x01c1b000, 4 * KiB },
- { "usb2-host", 0x01c1c000, 4 * KiB },
+ { "usb2-phy", 0x01c1c800, 2 * KiB },
{ "cs1", 0x01c1d000, 4 * KiB },
{ "spi3", 0x01c1f000, 4 * KiB },
{ "rtc", 0x01c20400, 1 * KiB },
@@ -181,6 +186,10 @@ enum {
AW_R40_GIC_SPI_MMC2 = 34,
AW_R40_GIC_SPI_MMC3 = 35,
AW_R40_GIC_SPI_EMAC = 55,
+ AW_R40_GIC_SPI_OHCI1 = 64,
+ AW_R40_GIC_SPI_OHCI2 = 65,
+ AW_R40_GIC_SPI_EHCI1 = 76,
+ AW_R40_GIC_SPI_EHCI2 = 78,
AW_R40_GIC_SPI_GMAC = 85,
};
@@ -276,6 +285,13 @@ static void allwinner_r40_init(Object *obj)
TYPE_AW_SDHOST_SUN50I_A64);
}
+ for (size_t i = 0; i < AW_R40_NUM_USB; i++) {
+ object_initialize_child(obj, "ehci[*]", &s->ehci[i],
+ TYPE_PLATFORM_EHCI);
+ object_initialize_child(obj, "ohci[*]", &s->ohci[i],
+ TYPE_SYSBUS_OHCI);
+ }
+
object_initialize_child(obj, "twi0", &s->i2c0, TYPE_AW_I2C_SUN6I);
object_initialize_child(obj, "emac", &s->emac, TYPE_AW_EMAC);
@@ -407,6 +423,33 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp)
sysbus_realize(SYS_BUS_DEVICE(&s->ccu), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccu), 0, s->memmap[AW_R40_DEV_CCU]);
+ /* USB */
+ for (size_t i = 0; i < AW_R40_NUM_USB; i++) {
+ g_autofree char *bus = g_strdup_printf("usb-bus.%zu", i);
+
+ object_property_set_bool(OBJECT(&s->ehci[i]), "companion-enable", true,
+ &error_fatal);
+ sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), &error_fatal);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0,
+ allwinner_r40_memmap[i ? AW_R40_DEV_EHCI2
+ : AW_R40_DEV_EHCI1]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
+ qdev_get_gpio_in(DEVICE(&s->gic),
+ i ? AW_R40_GIC_SPI_EHCI2
+ : AW_R40_GIC_SPI_EHCI1));
+
+ object_property_set_str(OBJECT(&s->ohci[i]), "masterbus", bus,
+ &error_fatal);
+ sysbus_realize(SYS_BUS_DEVICE(&s->ohci[i]), &error_fatal);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0,
+ allwinner_r40_memmap[i ? AW_R40_DEV_OHCI2
+ : AW_R40_DEV_OHCI1]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci[i]), 0,
+ qdev_get_gpio_in(DEVICE(&s->gic),
+ i ? AW_R40_GIC_SPI_OHCI2
+ : AW_R40_GIC_SPI_OHCI1));
+ }
+
/* SD/MMC */
for (int i = 0; i < AW_R40_NUM_MMCS; i++) {
qemu_irq irq = qdev_get_gpio_in(DEVICE(&s->gic),
diff --git a/include/hw/arm/allwinner-r40.h b/include/hw/arm/allwinner-r40.h
index 6e1ac9d4c1..ae82822d42 100644
--- a/include/hw/arm/allwinner-r40.h
+++ b/include/hw/arm/allwinner-r40.h
@@ -30,6 +30,8 @@
#include "hw/i2c/allwinner-i2c.h"
#include "hw/net/allwinner_emac.h"
#include "hw/net/allwinner-sun8i-emac.h"
+#include "hw/usb/hcd-ohci.h"
+#include "hw/usb/hcd-ehci.h"
#include "target/arm/cpu.h"
#include "sysemu/block-backend.h"
@@ -44,6 +46,10 @@ enum {
AW_R40_DEV_MMC1,
AW_R40_DEV_MMC2,
AW_R40_DEV_MMC3,
+ AW_R40_DEV_EHCI1,
+ AW_R40_DEV_OHCI1,
+ AW_R40_DEV_EHCI2,
+ AW_R40_DEV_OHCI2,
AW_R40_DEV_CCU,
AW_R40_DEV_PIT,
AW_R40_DEV_UART0,
@@ -88,6 +94,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(AwR40State, AW_R40)
* which are currently emulated by the R40 SoC code.
*/
#define AW_R40_NUM_MMCS 4
+#define AW_R40_NUM_USB 2
#define AW_R40_NUM_UARTS 8
struct AwR40State {
@@ -106,6 +113,8 @@ struct AwR40State {
AwSRAMCState sramc;
AwA10PITState timer;
AwSdHostState mmc[AW_R40_NUM_MMCS];
+ EHCISysBusState ehci[AW_R40_NUM_USB];
+ OHCISysBusState ohci[AW_R40_NUM_USB];
AwR40ClockCtlState ccu;
AwR40DramCtlState dramc;
AWI2CState i2c0;
--
2.39.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v2 1/3] hw/arm: Add EHCI/OHCI controllers to Allwinner R40 and Bananapi board
2024-01-15 18:27 ` [PATCH v2 1/3] hw/arm: Add EHCI/OHCI controllers to Allwinner R40 and Bananapi board Guenter Roeck
@ 2024-01-16 9:56 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 9+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-16 9:56 UTC (permalink / raw)
To: Guenter Roeck, Peter Maydell
Cc: Paolo Bonzini, Beniamino Galvani, Strahinja Jankovic, qemu-devel,
qemu-arm
On 15/1/24 19:27, Guenter Roeck wrote:
> Allwinner R40 supports two USB host ports shared between a USB 2.0 EHCI
> host controller and a USB 1.1 OHCI host controller. Add support for both
> of them.
>
> If machine USB support is not enabled, create unimplemented devices
> for the USB memory ranges to avoid crashes when booting Linux.
>
> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
> ---
> v2: The USB Controllers are part of the chipset, so instantiate them
> unconditionally
>
> docs/system/arm/bananapi_m2u.rst | 2 +-
> hw/arm/Kconfig | 2 ++
> hw/arm/allwinner-r40.c | 47 ++++++++++++++++++++++++++++++--
> include/hw/arm/allwinner-r40.h | 9 ++++++
> 4 files changed, 57 insertions(+), 3 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 2/3] hw/arm: Add AHCI/SATA controller to Allwinner R40 and Bananapi board
2024-01-15 18:27 [PATCH v2 0/3] hw/arm: Add support for USB, SATA, and watchdog to Allwinner R40 Guenter Roeck
2024-01-15 18:27 ` [PATCH v2 1/3] hw/arm: Add EHCI/OHCI controllers to Allwinner R40 and Bananapi board Guenter Roeck
@ 2024-01-15 18:27 ` Guenter Roeck
2024-01-15 18:27 ` [PATCH v2 3/3] hw/arm: Add watchdog timer to Allwinner H40 " Guenter Roeck
2024-01-19 16:57 ` [PATCH v2 0/3] hw/arm: Add support for USB, SATA, and watchdog to Allwinner R40 Peter Maydell
3 siblings, 0 replies; 9+ messages in thread
From: Guenter Roeck @ 2024-01-15 18:27 UTC (permalink / raw)
To: Peter Maydell
Cc: Paolo Bonzini, Beniamino Galvani, Strahinja Jankovic, qemu-devel,
qemu-arm, Guenter Roeck, Philippe Mathieu-Daudé
Allwinner R40 supports an AHCI compliant SATA controller.
Add support for it.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
docs/system/arm/bananapi_m2u.rst | 1 +
hw/arm/Kconfig | 1 +
hw/arm/allwinner-r40.c | 12 +++++++++++-
include/hw/arm/allwinner-r40.h | 3 +++
4 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/docs/system/arm/bananapi_m2u.rst b/docs/system/arm/bananapi_m2u.rst
index e77c425e2c..542310591d 100644
--- a/docs/system/arm/bananapi_m2u.rst
+++ b/docs/system/arm/bananapi_m2u.rst
@@ -22,6 +22,7 @@ The Banana Pi M2U machine supports the following devices:
* EMAC ethernet
* GMAC ethernet
* Clock Control Unit
+ * SATA
* TWI (I2C)
* USB 2.0
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 6b508780d3..98ca5ebc7d 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -408,6 +408,7 @@ config ALLWINNER_H3
config ALLWINNER_R40
bool
default y if TCG && ARM
+ select AHCI
select ALLWINNER_SRAMC
select ALLWINNER_A10_PIT
select AXP2XX_PMU
diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c
index 2e8943eff7..534be4a735 100644
--- a/hw/arm/allwinner-r40.c
+++ b/hw/arm/allwinner-r40.c
@@ -46,6 +46,7 @@ const hwaddr allwinner_r40_memmap[] = {
[AW_R40_DEV_MMC1] = 0x01c10000,
[AW_R40_DEV_MMC2] = 0x01c11000,
[AW_R40_DEV_MMC3] = 0x01c12000,
+ [AW_R40_DEV_AHCI] = 0x01c18000,
[AW_R40_DEV_EHCI1] = 0x01c19000,
[AW_R40_DEV_OHCI1] = 0x01c19400,
[AW_R40_DEV_EHCI2] = 0x01c1c000,
@@ -93,7 +94,6 @@ static struct AwR40Unimplemented r40_unimplemented[] = {
{ "usb0-host", 0x01c14000, 4 * KiB },
{ "crypto", 0x01c15000, 4 * KiB },
{ "spi2", 0x01c17000, 4 * KiB },
- { "sata", 0x01c18000, 4 * KiB },
{ "usb1-phy", 0x01c19800, 2 * KiB },
{ "sid", 0x01c1b000, 4 * KiB },
{ "usb2-phy", 0x01c1c800, 2 * KiB },
@@ -186,6 +186,7 @@ enum {
AW_R40_GIC_SPI_MMC2 = 34,
AW_R40_GIC_SPI_MMC3 = 35,
AW_R40_GIC_SPI_EMAC = 55,
+ AW_R40_GIC_SPI_AHCI = 56,
AW_R40_GIC_SPI_OHCI1 = 64,
AW_R40_GIC_SPI_OHCI2 = 65,
AW_R40_GIC_SPI_EHCI1 = 76,
@@ -285,6 +286,8 @@ static void allwinner_r40_init(Object *obj)
TYPE_AW_SDHOST_SUN50I_A64);
}
+ object_initialize_child(obj, "sata", &s->sata, TYPE_ALLWINNER_AHCI);
+
for (size_t i = 0; i < AW_R40_NUM_USB; i++) {
object_initialize_child(obj, "ehci[*]", &s->ehci[i],
TYPE_PLATFORM_EHCI);
@@ -423,6 +426,13 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp)
sysbus_realize(SYS_BUS_DEVICE(&s->ccu), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccu), 0, s->memmap[AW_R40_DEV_CCU]);
+ /* SATA / AHCI */
+ sysbus_realize(SYS_BUS_DEVICE(&s->sata), &error_fatal);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0,
+ allwinner_r40_memmap[AW_R40_DEV_AHCI]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0,
+ qdev_get_gpio_in(DEVICE(&s->gic), AW_R40_GIC_SPI_AHCI));
+
/* USB */
for (size_t i = 0; i < AW_R40_NUM_USB; i++) {
g_autofree char *bus = g_strdup_printf("usb-bus.%zu", i);
diff --git a/include/hw/arm/allwinner-r40.h b/include/hw/arm/allwinner-r40.h
index ae82822d42..c589fcc1c1 100644
--- a/include/hw/arm/allwinner-r40.h
+++ b/include/hw/arm/allwinner-r40.h
@@ -22,6 +22,7 @@
#include "qom/object.h"
#include "hw/timer/allwinner-a10-pit.h"
+#include "hw/ide/ahci.h"
#include "hw/intc/arm_gic.h"
#include "hw/sd/allwinner-sdhost.h"
#include "hw/misc/allwinner-r40-ccu.h"
@@ -46,6 +47,7 @@ enum {
AW_R40_DEV_MMC1,
AW_R40_DEV_MMC2,
AW_R40_DEV_MMC3,
+ AW_R40_DEV_AHCI,
AW_R40_DEV_EHCI1,
AW_R40_DEV_OHCI1,
AW_R40_DEV_EHCI2,
@@ -112,6 +114,7 @@ struct AwR40State {
const hwaddr *memmap;
AwSRAMCState sramc;
AwA10PITState timer;
+ AllwinnerAHCIState sata;
AwSdHostState mmc[AW_R40_NUM_MMCS];
EHCISysBusState ehci[AW_R40_NUM_USB];
OHCISysBusState ohci[AW_R40_NUM_USB];
--
2.39.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v2 3/3] hw/arm: Add watchdog timer to Allwinner H40 and Bananapi board
2024-01-15 18:27 [PATCH v2 0/3] hw/arm: Add support for USB, SATA, and watchdog to Allwinner R40 Guenter Roeck
2024-01-15 18:27 ` [PATCH v2 1/3] hw/arm: Add EHCI/OHCI controllers to Allwinner R40 and Bananapi board Guenter Roeck
2024-01-15 18:27 ` [PATCH v2 2/3] hw/arm: Add AHCI/SATA controller " Guenter Roeck
@ 2024-01-15 18:27 ` Guenter Roeck
2024-01-16 10:04 ` Philippe Mathieu-Daudé
2024-01-19 16:57 ` [PATCH v2 0/3] hw/arm: Add support for USB, SATA, and watchdog to Allwinner R40 Peter Maydell
3 siblings, 1 reply; 9+ messages in thread
From: Guenter Roeck @ 2024-01-15 18:27 UTC (permalink / raw)
To: Peter Maydell
Cc: Paolo Bonzini, Beniamino Galvani, Strahinja Jankovic, qemu-devel,
qemu-arm, Guenter Roeck
Add watchdog timer support to Allwinner-H40 and Bananapi.
The watchdog timer is added as an overlay to the Timer
module memory map.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
docs/system/arm/bananapi_m2u.rst | 2 +-
hw/arm/Kconfig | 1 +
hw/arm/allwinner-r40.c | 8 ++++++++
include/hw/arm/allwinner-r40.h | 3 +++
4 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/docs/system/arm/bananapi_m2u.rst b/docs/system/arm/bananapi_m2u.rst
index 542310591d..587b488655 100644
--- a/docs/system/arm/bananapi_m2u.rst
+++ b/docs/system/arm/bananapi_m2u.rst
@@ -25,6 +25,7 @@ The Banana Pi M2U machine supports the following devices:
* SATA
* TWI (I2C)
* USB 2.0
+ * Hardware Watchdog
Limitations
"""""""""""
@@ -33,7 +34,6 @@ Currently, Banana Pi M2U does *not* support the following features:
- Graphical output via HDMI, GPU and/or the Display Engine
- Audio output
-- Hardware Watchdog
- Real Time Clock
Also see the 'unimplemented' array in the Allwinner R40 SoC module
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 98ca5ebc7d..386edbae15 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -411,6 +411,7 @@ config ALLWINNER_R40
select AHCI
select ALLWINNER_SRAMC
select ALLWINNER_A10_PIT
+ select ALLWINNER_WDT
select AXP2XX_PMU
select SERIAL
select ARM_TIMER
diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c
index 534be4a735..a28e5b3886 100644
--- a/hw/arm/allwinner-r40.c
+++ b/hw/arm/allwinner-r40.c
@@ -53,6 +53,7 @@ const hwaddr allwinner_r40_memmap[] = {
[AW_R40_DEV_OHCI2] = 0x01c1c400,
[AW_R40_DEV_CCU] = 0x01c20000,
[AW_R40_DEV_PIT] = 0x01c20c00,
+ [AW_R40_DEV_WDT] = 0x01c20c90,
[AW_R40_DEV_UART0] = 0x01c28000,
[AW_R40_DEV_UART1] = 0x01c28400,
[AW_R40_DEV_UART2] = 0x01c28800,
@@ -279,6 +280,8 @@ static void allwinner_r40_init(Object *obj)
object_property_add_alias(obj, "clk1-freq", OBJECT(&s->timer),
"clk1-freq");
+ object_initialize_child(obj, "wdt", &s->wdt, TYPE_AW_WDT_SUN4I);
+
object_initialize_child(obj, "ccu", &s->ccu, TYPE_AW_R40_CCU);
for (int i = 0; i < AW_R40_NUM_MMCS; i++) {
@@ -545,6 +548,11 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->emac), 0,
qdev_get_gpio_in(DEVICE(&s->gic), AW_R40_GIC_SPI_EMAC));
+ /* WDT */
+ sysbus_realize(SYS_BUS_DEVICE(&s->wdt), &error_fatal);
+ sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->wdt), 0,
+ allwinner_r40_memmap[AW_R40_DEV_WDT], 1);
+
/* Unimplemented devices */
for (unsigned i = 0; i < ARRAY_SIZE(r40_unimplemented); i++) {
create_unimplemented_device(r40_unimplemented[i].device_name,
diff --git a/include/hw/arm/allwinner-r40.h b/include/hw/arm/allwinner-r40.h
index c589fcc1c1..66c38e7d90 100644
--- a/include/hw/arm/allwinner-r40.h
+++ b/include/hw/arm/allwinner-r40.h
@@ -33,6 +33,7 @@
#include "hw/net/allwinner-sun8i-emac.h"
#include "hw/usb/hcd-ohci.h"
#include "hw/usb/hcd-ehci.h"
+#include "hw/watchdog/allwinner-wdt.h"
#include "target/arm/cpu.h"
#include "sysemu/block-backend.h"
@@ -54,6 +55,7 @@ enum {
AW_R40_DEV_OHCI2,
AW_R40_DEV_CCU,
AW_R40_DEV_PIT,
+ AW_R40_DEV_WDT,
AW_R40_DEV_UART0,
AW_R40_DEV_UART1,
AW_R40_DEV_UART2,
@@ -114,6 +116,7 @@ struct AwR40State {
const hwaddr *memmap;
AwSRAMCState sramc;
AwA10PITState timer;
+ AwWdtState wdt;
AllwinnerAHCIState sata;
AwSdHostState mmc[AW_R40_NUM_MMCS];
EHCISysBusState ehci[AW_R40_NUM_USB];
--
2.39.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v2 3/3] hw/arm: Add watchdog timer to Allwinner H40 and Bananapi board
2024-01-15 18:27 ` [PATCH v2 3/3] hw/arm: Add watchdog timer to Allwinner H40 " Guenter Roeck
@ 2024-01-16 10:04 ` Philippe Mathieu-Daudé
2024-01-16 15:32 ` Guenter Roeck
2024-01-17 22:43 ` Strahinja Jankovic
0 siblings, 2 replies; 9+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-16 10:04 UTC (permalink / raw)
To: Guenter Roeck, Peter Maydell
Cc: Paolo Bonzini, Beniamino Galvani, Strahinja Jankovic, qemu-devel,
qemu-arm, Li Guang, Strahinja Jankovic, Niek Linnenbank
Hi,
(Cc'ing Li, Strahinja and Niek)
On 15/1/24 19:27, Guenter Roeck wrote:
> Add watchdog timer support to Allwinner-H40 and Bananapi.
> The watchdog timer is added as an overlay to the Timer
> module memory map.
I'm confused by these registers from TYPE_AW_A10_PIT
and the TYPE_AW_WDT implementation you are using:
#define AW_A10_PIT_WDOG_CONTROL 0x90
#define AW_A10_PIT_WDOG_MODE 0x94
Do we have 2 implementations of the same peripheral?
Should we instanciate AW_WDT within AW_A10_PIT?
> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
> ---
> docs/system/arm/bananapi_m2u.rst | 2 +-
> hw/arm/Kconfig | 1 +
> hw/arm/allwinner-r40.c | 8 ++++++++
> include/hw/arm/allwinner-r40.h | 3 +++
> 4 files changed, 13 insertions(+), 1 deletion(-)
> diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c
> index 534be4a735..a28e5b3886 100644
> --- a/hw/arm/allwinner-r40.c
> +++ b/hw/arm/allwinner-r40.c
> @@ -53,6 +53,7 @@ const hwaddr allwinner_r40_memmap[] = {
> [AW_R40_DEV_OHCI2] = 0x01c1c400,
> [AW_R40_DEV_CCU] = 0x01c20000,
> [AW_R40_DEV_PIT] = 0x01c20c00,
> + [AW_R40_DEV_WDT] = 0x01c20c90,
> [AW_R40_DEV_UART0] = 0x01c28000,
> [AW_R40_DEV_UART1] = 0x01c28400,
> [AW_R40_DEV_UART2] = 0x01c28800,
> @@ -279,6 +280,8 @@ static void allwinner_r40_init(Object *obj)
> object_property_add_alias(obj, "clk1-freq", OBJECT(&s->timer),
> "clk1-freq");
>
> + object_initialize_child(obj, "wdt", &s->wdt, TYPE_AW_WDT_SUN4I);
> +
> object_initialize_child(obj, "ccu", &s->ccu, TYPE_AW_R40_CCU);
>
> for (int i = 0; i < AW_R40_NUM_MMCS; i++) {
> @@ -545,6 +548,11 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp)
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->emac), 0,
> qdev_get_gpio_in(DEVICE(&s->gic), AW_R40_GIC_SPI_EMAC));
>
> + /* WDT */
> + sysbus_realize(SYS_BUS_DEVICE(&s->wdt), &error_fatal);
> + sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->wdt), 0,
> + allwinner_r40_memmap[AW_R40_DEV_WDT], 1);
> +
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH v2 3/3] hw/arm: Add watchdog timer to Allwinner H40 and Bananapi board
2024-01-16 10:04 ` Philippe Mathieu-Daudé
@ 2024-01-16 15:32 ` Guenter Roeck
2024-01-17 22:43 ` Strahinja Jankovic
1 sibling, 0 replies; 9+ messages in thread
From: Guenter Roeck @ 2024-01-16 15:32 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, Peter Maydell
Cc: Paolo Bonzini, Beniamino Galvani, Strahinja Jankovic, qemu-devel,
qemu-arm, Li Guang, Niek Linnenbank
On 1/16/24 02:04, Philippe Mathieu-Daudé wrote:
> Hi,
>
> (Cc'ing Li, Strahinja and Niek)
>
> On 15/1/24 19:27, Guenter Roeck wrote:
>> Add watchdog timer support to Allwinner-H40 and Bananapi.
>> The watchdog timer is added as an overlay to the Timer
>> module memory map.
>
> I'm confused by these registers from TYPE_AW_A10_PIT
> and the TYPE_AW_WDT implementation you are using:
>
> #define AW_A10_PIT_WDOG_CONTROL 0x90
> #define AW_A10_PIT_WDOG_MODE 0x94
>
> Do we have 2 implementations of the same peripheral?
>
The watchdog core in A10 and H40 is the same. Linux devicetree uses
allwinner,sun4i-a10-wdt for several chips.
arch/arm/boot/dts/allwinner/sun4i-a10.dtsi: compatible = "allwinner,sun4i-a10-wdt";
arch/arm/boot/dts/allwinner/sun5i.dtsi: compatible = "allwinner,sun4i-a10-wdt";
arch/arm/boot/dts/allwinner/sun7i-a20.dtsi: compatible = "allwinner,sun4i-a10-wdt";
arch/arm/boot/dts/allwinner/sun8i-r40.dtsi: compatible = "allwinner,sun4i-a10-wdt";
> Should we instanciate AW_WDT within AW_A10_PIT?
>
As far as I can see, AW_A10_PIT_WDOG_CONTROL and AW_A10_PIT_WDOG_MODE
are not really handled in hw/timer/allwinner-a10-pit.c because of the
memory range overlay, and the defines might as well be dropped from there.
It made some sense to have them when the watchdog wasn't implemented
to avoid emulation errors, but afaics they are now obsolete.
The wdt type (TYPE_AW_WDT_SUN4I) more accurately reflects the watchdog
type. Control and mode registers are model specific. For example,
sun6i and sun9i use the same timer and watchdog cores but with
different register offsets and bit values for the watchdog registers.
sun8i uses the same watchdog core (and same register offsets) as
sun6i/sun9i, but the timer module itself is different. Implementing that
with the current model (using memory map overlays) is straightforward.
I don't know how one would do that from the timer modules; it seems
more complex to me than the current implementation.
On the other side, I don't know how the "proper" implementation in
qemu would look like, so I don't really have a strong opinion either
way.
Guenter
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 3/3] hw/arm: Add watchdog timer to Allwinner H40 and Bananapi board
2024-01-16 10:04 ` Philippe Mathieu-Daudé
2024-01-16 15:32 ` Guenter Roeck
@ 2024-01-17 22:43 ` Strahinja Jankovic
1 sibling, 0 replies; 9+ messages in thread
From: Strahinja Jankovic @ 2024-01-17 22:43 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Guenter Roeck, Peter Maydell, Paolo Bonzini, Beniamino Galvani,
qemu-devel, qemu-arm, Li Guang, Niek Linnenbank
[-- Attachment #1: Type: text/plain, Size: 3289 bytes --]
Hi Philippe,
On Tue, Jan 16, 2024 at 11:04 AM Philippe Mathieu-Daudé <philmd@linaro.org>
wrote:
> Hi,
>
> (Cc'ing Li, Strahinja and Niek)
>
> On 15/1/24 19:27, Guenter Roeck wrote:
> > Add watchdog timer support to Allwinner-H40 and Bananapi.
> > The watchdog timer is added as an overlay to the Timer
> > module memory map.
>
> I'm confused by these registers from TYPE_AW_A10_PIT
> and the TYPE_AW_WDT implementation you are using:
>
> #define AW_A10_PIT_WDOG_CONTROL 0x90
> #define AW_A10_PIT_WDOG_MODE 0x94
>
> Do we have 2 implementations of the same peripheral?
>
The inspiration for the AW_WDT implementation, with overlay of WDOG_CONTROL
and WDOG_MODE registers in the PIT memory map, was taken from the AW_RTC
implementation.
That was the easiest way to implement watchdog functionality, and also
keeps logical functionality in the appropriate place (hw/watchdog) instead
of bundling it with the timer.
As Guenter commented, the AW_A10_PIT does not do anything with those two
registers and with overlay it does not matter anymore.
>
> Should we instanciate AW_WDT within AW_A10_PIT?
>
Unfortunately, I don't know what that would look like and what benefits we
would have from it. Can you point me to an example that already exists?
> > Signed-off-by: Guenter Roeck <linux@roeck-us.net>
>
Guenter, thank you for submitting this change. The commit looks fine to me,
so
Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com>
Best regards,
Strahinja
> ---
> > docs/system/arm/bananapi_m2u.rst | 2 +-
> > hw/arm/Kconfig | 1 +
> > hw/arm/allwinner-r40.c | 8 ++++++++
> > include/hw/arm/allwinner-r40.h | 3 +++
> > 4 files changed, 13 insertions(+), 1 deletion(-)
>
>
> > diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c
> > index 534be4a735..a28e5b3886 100644
> > --- a/hw/arm/allwinner-r40.c
> > +++ b/hw/arm/allwinner-r40.c
> > @@ -53,6 +53,7 @@ const hwaddr allwinner_r40_memmap[] = {
> > [AW_R40_DEV_OHCI2] = 0x01c1c400,
> > [AW_R40_DEV_CCU] = 0x01c20000,
> > [AW_R40_DEV_PIT] = 0x01c20c00,
> > + [AW_R40_DEV_WDT] = 0x01c20c90,
> > [AW_R40_DEV_UART0] = 0x01c28000,
> > [AW_R40_DEV_UART1] = 0x01c28400,
> > [AW_R40_DEV_UART2] = 0x01c28800,
> > @@ -279,6 +280,8 @@ static void allwinner_r40_init(Object *obj)
> > object_property_add_alias(obj, "clk1-freq", OBJECT(&s->timer),
> > "clk1-freq");
> >
> > + object_initialize_child(obj, "wdt", &s->wdt, TYPE_AW_WDT_SUN4I);
> > +
> > object_initialize_child(obj, "ccu", &s->ccu, TYPE_AW_R40_CCU);
> >
> > for (int i = 0; i < AW_R40_NUM_MMCS; i++) {
> > @@ -545,6 +548,11 @@ static void allwinner_r40_realize(DeviceState *dev,
> Error **errp)
> > sysbus_connect_irq(SYS_BUS_DEVICE(&s->emac), 0,
> > qdev_get_gpio_in(DEVICE(&s->gic),
> AW_R40_GIC_SPI_EMAC));
> >
> > + /* WDT */
> > + sysbus_realize(SYS_BUS_DEVICE(&s->wdt), &error_fatal);
> > + sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->wdt), 0,
> > + allwinner_r40_memmap[AW_R40_DEV_WDT], 1);
> > +
>
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 0/3] hw/arm: Add support for USB, SATA, and watchdog to Allwinner R40
2024-01-15 18:27 [PATCH v2 0/3] hw/arm: Add support for USB, SATA, and watchdog to Allwinner R40 Guenter Roeck
` (2 preceding siblings ...)
2024-01-15 18:27 ` [PATCH v2 3/3] hw/arm: Add watchdog timer to Allwinner H40 " Guenter Roeck
@ 2024-01-19 16:57 ` Peter Maydell
3 siblings, 0 replies; 9+ messages in thread
From: Peter Maydell @ 2024-01-19 16:57 UTC (permalink / raw)
To: Guenter Roeck
Cc: Paolo Bonzini, Beniamino Galvani, Strahinja Jankovic, qemu-devel,
qemu-arm
On Mon, 15 Jan 2024 at 18:28, Guenter Roeck <linux@roeck-us.net> wrote:
>
> Add support for
>
> - USB 2.0 EHCI/OHCI
> - SATA/AHCI
> - Watchdog
>
> to Allwinner R40. The hardware is quite similar to Allwinner A10 and H3,
> so the code is derived from the implementations for those SOCs.
>
> Tested with bpim2u emulation by instantiating EHCI and OHCI keyboards,
> by booting from USB, by booting from ATA/SATA drive, and by manually
> testing watchdog operation.
>
> v2:
> - The USB Controllers are part of the chipset, so instantiate them
> unconditionally
> - Add Reviewed-by: tag to patch 2/3
>
Applied to target-arm.next, thanks.
-- PMM
^ permalink raw reply [flat|nested] 9+ messages in thread