From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: "Corvin Köhne" <corvin.koehne@gmail.com>, qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Yannick Voßen" <y.vossen@beckhoff.com>,
qemu-block@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
"Hanna Reitz" <hreitz@redhat.com>,
"Alistair Francis" <alistair@alistair23.me>,
qemu-arm@nongnu.org, "Corvin Köhne" <c.koehne@beckhoff.com>,
"Kevin Wolf" <kwolf@redhat.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Edgar E. Iglesias" <edgar.iglesias@amd.com>
Subject: Re: [PATCH v4 04/15] hw/arm/zynq-devcfg: Prevent unintended unlock during initialization
Date: Wed, 12 Nov 2025 12:27:59 +0100 [thread overview]
Message-ID: <75da1fc5-0140-4c98-a4c0-b1946c9f61a8@linaro.org> (raw)
In-Reply-To: <20251111102836.212535-5-corvin.koehne@gmail.com>
Hi,
On 11/11/25 11:28, Corvin Köhne wrote:
> From: YannickV <Y.Vossen@beckhoff.com>
>
> During the emulation startup, all registers are reset, which triggers the
> `r_unlock_post_write` function with a value of 0. This led to an
> unintended memory access disable, making the devcfg unusable.
>
> During startup, the memory space no longer gets locked.
>
> Signed-off-by: YannickV <Y.Vossen@beckhoff.com>
> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
> ---
> hw/dma/xlnx-zynq-devcfg.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/hw/dma/xlnx-zynq-devcfg.c b/hw/dma/xlnx-zynq-devcfg.c
> index b838c1c0d0..f28d0015e6 100644
> --- a/hw/dma/xlnx-zynq-devcfg.c
> +++ b/hw/dma/xlnx-zynq-devcfg.c
> @@ -221,7 +221,9 @@ static void r_unlock_post_write(RegisterInfo *reg, uint64_t val)
> {
> XlnxZynqDevcfg *s = XLNX_ZYNQ_DEVCFG(reg->opaque);
> const char *device_prefix = object_get_typename(OBJECT(s));
> -
> + if (device_is_in_reset(DEVICE(s))) {
> + return;
Alistair, does this belong to the upper layer in register_reset()?
> + }
> if (val == R_UNLOCK_MAGIC) {
> DB_PRINT("successful unlock\n");
> s->regs[R_CTRL] |= R_CTRL_PCAP_PR_MASK;
next prev parent reply other threads:[~2025-11-12 11:28 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-11 10:28 [PATCH v4 00/15] hw/arm: add Beckhoff CX7200 board Corvin Köhne
2025-11-11 10:28 ` [PATCH v4 01/15] hw/timer: Make frequency configurable Corvin Köhne
2025-11-12 11:24 ` Philippe Mathieu-Daudé
2025-11-11 10:28 ` [PATCH v4 02/15] hw/timer: Make PERIPHCLK divider configurable Corvin Köhne
2025-11-12 11:25 ` Philippe Mathieu-Daudé
2025-11-11 10:28 ` [PATCH v4 03/15] hw/dma/zynq-devcfg: Handle bitstream loading via DMA to 0xffffffff Corvin Köhne
2025-11-11 10:28 ` [PATCH v4 04/15] hw/arm/zynq-devcfg: Prevent unintended unlock during initialization Corvin Köhne
2025-11-12 11:27 ` Philippe Mathieu-Daudé [this message]
2025-11-11 10:28 ` [PATCH v4 05/15] hw/dma/zynq: Ensure PCFG_DONE bit remains set to indicate PL is in user mode Corvin Köhne
2025-11-11 10:28 ` [PATCH v4 06/15] hw/dma/zynq-devcfg: Simulate dummy PL reset Corvin Köhne
2025-11-11 10:28 ` [PATCH v4 07/15] hw/dma/zynq-devcfg: Indicate power-up status of PL Corvin Köhne
2025-11-11 10:28 ` [PATCH v4 08/15] hw/dma/zynq-devcfg: Fix register memory Corvin Köhne
2025-11-12 11:31 ` [PATCH-for-10.2 " Philippe Mathieu-Daudé
2025-11-11 10:28 ` [PATCH v4 09/15] hw/misc: Add dummy ZYNQ DDR controller Corvin Köhne
2025-11-11 10:28 ` [PATCH v4 10/15] hw/misc/zynq_slcr: Add logic for DCI configuration Corvin Köhne
2025-11-11 10:28 ` [PATCH v4 11/15] hw/misc: Add Beckhoff CCAT device Corvin Köhne
2025-11-12 11:36 ` Philippe Mathieu-Daudé
2025-11-11 10:28 ` [PATCH v4 12/15] hw/block/m25p80: Add HAS_SR_TB flag for is25lp016d Corvin Köhne
2025-11-11 10:28 ` [PATCH v4 13/15] hw/arm: Add new machine based on xilinx-zynq-a9 for Beckhoff CX7200 Corvin Köhne
2025-11-12 11:43 ` Philippe Mathieu-Daudé
2025-11-11 10:28 ` [PATCH v4 14/15] tests/functional: Add a Beckhoff CX7200 test Corvin Köhne
2025-11-12 11:44 ` Philippe Mathieu-Daudé
2025-11-11 10:28 ` [PATCH v4 15/15] docs/system/arm: Add support for Beckhoff CX7200 Corvin Köhne
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