From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Zhao Liu <zhao1.liu@linux.intel.com>,
Eduardo Habkost <eduardo@habkost.net>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Yanan Wang <wangyanan55@huawei.com>,
"Michael S . Tsirkin" <mst@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Paolo Bonzini <pbonzini@redhat.com>,
Marcelo Tosatti <mtosatti@redhat.com>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org,
Zhenyu Wang <zhenyu.z.wang@intel.com>,
Xiaoyao Li <xiaoyao.li@intel.com>,
Babu Moger <babu.moger@amd.com>, Zhao Liu <zhao1.liu@intel.com>,
Yongwei Ma <yongwei.ma@intel.com>
Subject: Re: [PATCH v4 21/21] i386: Add new property to control L2 cache topo in CPUID.04H
Date: Thu, 14 Sep 2023 09:41:30 +0200 [thread overview]
Message-ID: <75ea5477-ca1b-7016-273c-abd6c36f4be4@linaro.org> (raw)
In-Reply-To: <20230914072159.1177582-22-zhao1.liu@linux.intel.com>
On 14/9/23 09:21, Zhao Liu wrote:
> From: Zhao Liu <zhao1.liu@intel.com>
>
> The property x-l2-cache-topo will be used to change the L2 cache
> topology in CPUID.04H.
>
> Now it allows user to set the L2 cache is shared in core level or
> cluster level.
>
> If user passes "-cpu x-l2-cache-topo=[core|cluster]" then older L2 cache
> topology will be overrode by the new topology setting.
>
> Here we expose to user "cluster" instead of "module", to be consistent
> with "cluster-id" naming.
>
> Since CPUID.04H is used by intel CPUs, this property is available on
> intel CPUs as for now.
>
> When necessary, it can be extended to CPUID.8000001DH for AMD CPUs.
>
> (Tested the cache topology in CPUID[0x04] leaf with "x-l2-cache-topo=[
> core|cluster]", and tested the live migration between the QEMUs w/ &
> w/o this patch series.)
>
> Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
> Tested-by: Yongwei Ma <yongwei.ma@intel.com>
> ---
> Changes since v3:
> * Add description about test for live migration compatibility. (Babu)
>
> Changes since v1:
> * Rename MODULE branch to CPU_TOPO_LEVEL_MODULE to match the previous
> renaming changes.
> ---
> target/i386/cpu.c | 34 +++++++++++++++++++++++++++++++++-
> target/i386/cpu.h | 2 ++
> 2 files changed, 35 insertions(+), 1 deletion(-)
> @@ -8079,6 +8110,7 @@ static Property x86_cpu_properties[] = {
> false),
> DEFINE_PROP_BOOL("x-intel-pt-auto-level", X86CPU, intel_pt_auto_level,
> true),
> + DEFINE_PROP_STRING("x-l2-cache-topo", X86CPU, l2_cache_topo_level),
We use the 'x-' prefix for unstable features, is it the case here?
> DEFINE_PROP_END_OF_LIST()
> };
next prev parent reply other threads:[~2023-09-14 7:42 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-14 7:21 [PATCH v4 00/21] Support smp.clusters for x86 in QEMU Zhao Liu
2023-09-14 7:21 ` [PATCH v4 01/21] i386: Fix comment style in topology.h Zhao Liu
2023-09-22 16:05 ` Moger, Babu
2023-09-26 3:11 ` Zhao Liu
2023-09-14 7:21 ` [PATCH v4 02/21] tests: Rename test-x86-cpuid.c to test-x86-topo.c Zhao Liu
2023-09-14 7:21 ` [PATCH v4 03/21] softmmu: Fix CPUSTATE.nr_cores' calculation Zhao Liu
2023-09-14 7:31 ` Philippe Mathieu-Daudé
2023-09-15 7:39 ` Zhao Liu
2023-09-14 7:21 ` [PATCH v4 04/21] hw/cpu: Update the comments of nr_cores and nr_dies Zhao Liu
2023-09-14 7:32 ` Philippe Mathieu-Daudé
2023-09-15 7:40 ` Zhao Liu
2023-09-14 7:21 ` [PATCH v4 05/21] i386/cpu: Fix i/d-cache topology to core level for Intel CPU Zhao Liu
2023-09-14 7:21 ` [PATCH v4 06/21] i386/cpu: Use APIC ID offset to encode cache topo in CPUID[4] Zhao Liu
2023-09-14 7:21 ` [PATCH v4 07/21] i386/cpu: Consolidate the use of topo_info in cpu_x86_cpuid() Zhao Liu
2023-09-14 7:21 ` [PATCH v4 08/21] i386: Split topology types of CPUID[0x1F] from the definitions of CPUID[0xB] Zhao Liu
2023-09-14 7:21 ` [PATCH v4 09/21] i386: Decouple CPUID[0x1F] subleaf with specific topology level Zhao Liu
2023-09-14 7:21 ` [PATCH v4 10/21] i386: Introduce module-level cpu topology to CPUX86State Zhao Liu
2023-09-14 7:38 ` Philippe Mathieu-Daudé
2023-09-15 7:50 ` Zhao Liu
2023-09-14 7:21 ` [PATCH v4 11/21] i386: Support modules_per_die in X86CPUTopoInfo Zhao Liu
2023-09-14 7:21 ` [PATCH v4 12/21] i386: Expose module level in CPUID[0x1F] Zhao Liu
2023-09-14 7:21 ` [PATCH v4 13/21] i386: Support module_id in X86CPUTopoIDs Zhao Liu
2023-09-14 7:21 ` [PATCH v4 14/21] i386/cpu: Introduce cluster-id to X86CPU Zhao Liu
2023-09-14 7:21 ` [PATCH v4 15/21] tests: Add test case of APIC ID for module level parsing Zhao Liu
2023-09-14 7:21 ` [PATCH v4 16/21] hw/i386/pc: Support smp.clusters for x86 PC machine Zhao Liu
2023-09-14 7:21 ` [PATCH v4 17/21] i386: Add cache topology info in CPUCacheInfo Zhao Liu
2023-09-14 7:21 ` [PATCH v4 18/21] i386: Use CPUCacheInfo.share_level to encode CPUID[4] Zhao Liu
2023-09-14 7:21 ` [PATCH v4 19/21] i386: Use offsets get NumSharingCache for CPUID[0x8000001D].EAX[bits 25:14] Zhao Liu
2023-09-22 19:27 ` Moger, Babu
2023-09-26 3:10 ` Zhao Liu
2023-09-14 7:21 ` [PATCH v4 20/21] i386: Use CPUCacheInfo.share_level to encode " Zhao Liu
2023-09-22 19:27 ` Moger, Babu
2023-09-26 3:08 ` Zhao Liu
2023-09-14 7:21 ` [PATCH v4 21/21] i386: Add new property to control L2 cache topo in CPUID.04H Zhao Liu
2023-09-14 7:41 ` Philippe Mathieu-Daudé [this message]
2023-09-15 7:53 ` Zhao Liu
2023-10-03 12:57 ` Michael S. Tsirkin
2023-10-06 16:36 ` Zhao Liu
2023-10-18 14:12 ` Zhao Liu
2023-09-22 16:03 ` [PATCH v4 00/21] Support smp.clusters for x86 in QEMU Moger, Babu
2023-09-26 3:11 ` Zhao Liu
2023-10-18 12:06 ` Michael S. Tsirkin
2023-10-18 14:08 ` Zhao Liu
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