From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1L5FOw-0001M9-R4 for qemu-devel@nongnu.org; Wed, 26 Nov 2008 03:05:34 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1L5FOv-0001LS-Th for qemu-devel@nongnu.org; Wed, 26 Nov 2008 03:05:34 -0500 Received: from [199.232.76.173] (port=51772 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1L5FOv-0001LH-NG for qemu-devel@nongnu.org; Wed, 26 Nov 2008 03:05:33 -0500 Received: from fg-out-1718.google.com ([72.14.220.156]:61960) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1L5FOv-000893-22 for qemu-devel@nongnu.org; Wed, 26 Nov 2008 03:05:33 -0500 Received: by fg-out-1718.google.com with SMTP id l26so230766fgb.8 for ; Wed, 26 Nov 2008 00:05:31 -0800 (PST) Message-ID: <761ea48b0811260005x1fb7138aqa963c16d88216082@mail.gmail.com> Date: Wed, 26 Nov 2008 09:05:31 +0100 From: "Laurent Desnogues" Subject: Re: [Qemu-devel] [PATCH] ARM: fix usad8 and usada8 instructions In-Reply-To: <1227655625-7809-1-git-send-email-mans@mansr.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <1227655625-7809-1-git-send-email-mans@mansr.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Wed, Nov 26, 2008 at 12:27 AM, Mans Rullgard wrote: > This fixes the destination and accumulator registers for the usad8 > and usada8 instructions. This patch is correct. Is this when I should put a "acked-by"? Laurent > Signed-off-by: Mans Rullgard > --- > target-arm/translate.c | 6 +++--- > 1 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/target-arm/translate.c b/target-arm/translate.c > index 186f1d5..305a438 100644 > --- a/target-arm/translate.c > +++ b/target-arm/translate.c > @@ -6556,12 +6556,12 @@ static void disas_arm_insn(CPUState * env, DisasContext *s) > tmp2 = load_reg(s, rs); > gen_helper_usad8(tmp, tmp, tmp2); > dead_tmp(tmp2); > - if (rn != 15) { > - tmp2 = load_reg(s, rn); > + if (rd != 15) { > + tmp2 = load_reg(s, rd); > tcg_gen_add_i32(tmp, tmp, tmp2); > dead_tmp(tmp2); > } > - store_reg(s, rd, tmp); > + store_reg(s, rn, tmp); > break; > case 0x20: case 0x24: case 0x28: case 0x2c: > /* Bitfield insert/clear. */ > -- > 1.6.0.4 > > > >