From: Laurent Desnogues <laurent.desnogues@gmail.com>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 1/3] PPC: Circumvent overflow in mtcrf
Date: Mon, 2 Mar 2009 23:45:47 +0100 [thread overview]
Message-ID: <761ea48b0903021445r3dd81ad6xec46e1919ed9e5a0@mail.gmail.com> (raw)
In-Reply-To: <1236013674-28082-2-git-send-email-agraf@suse.de>
On Mon, Mar 2, 2009 at 6:07 PM, Alexander Graf <agraf@suse.de> wrote:
> I had a segmentation fault in mtcrf, where ffs() returned 8 and the
> code then accessed cpu_crf[7 - 8].
>
> In order to circumvent this, I just put in an & 7 to the ffs result,
> so we'll never run negative. This is probably not correct, but makes
> things work for me so far.
>
> Signed-off-by: Alexander Graf <alex@csgraf.de>
> ---
> target-ppc/translate.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> index 2a06e4c..2e7420f 100644
> --- a/target-ppc/translate.c
> +++ b/target-ppc/translate.c
> @@ -3937,7 +3937,7 @@ GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC)
> crm = CRM(ctx->opcode);
> if (likely((ctx->opcode & 0x00100000) || (crm ^ (crm - 1)) == 0)) {
> TCGv_i32 temp = tcg_temp_new_i32();
> - crn = ffs(crm);
> + crn = ffs(crm) & 7;
> tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]);
> tcg_gen_shri_i32(cpu_crf[7 - crn], temp, crn * 4);
> tcg_gen_andi_i32(cpu_crf[7 - crn], cpu_crf[7 - crn], 0xf);
I think the problem lies in the if; could you try this?
if (likely((ctx->opcode & 0x00100000))
if (crm ^ (crm - 1)) == 0) {
TCGv_i32 temp = tcg_temp_new_i32();
crn = ffs(crm);
tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]);
tcg_gen_shri_i32(cpu_crf[7 - crn], temp, crn * 4);
tcg_gen_andi_i32(cpu_crf[7 - crn], cpu_crf[7 - crn], 0xf);
tcg_temp_free_i32(temp);
}
} else {
The Power spec says mtocrf is undefined if crm has not
exactly one bit set. The patch above will just make it a nop
(and will also generate code for mtcrf when it should instead
of wrongly generating buggy code for mtocrf when crm is a
power of 2 no matter what bit 20 [or bit 11 in dumb reversed
bit numbering scheme of Power] is).
Laurent
next prev parent reply other threads:[~2009-03-02 22:45 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-03-02 17:07 [Qemu-devel] [PATCH 0/3] PPC64 Linux bringup patches Alexander Graf
2009-03-02 17:07 ` [Qemu-devel] [PATCH 1/3] PPC: Circumvent overflow in mtcrf Alexander Graf
2009-03-02 17:07 ` [Qemu-devel] [PATCH 2/3] PPC64: Implement slbmte Alexander Graf
2009-03-02 17:07 ` [Qemu-devel] [PATCH 3/3] PPC64: Implement large pages Alexander Graf
2009-03-02 18:58 ` [Qemu-devel] Re: [PATCH 2/3] PPC64: Implement slbmte Blue Swirl
2009-03-02 19:00 ` Alexander Graf
2009-03-02 19:07 ` Paul Brook
2009-03-02 19:28 ` Blue Swirl
2009-03-02 19:47 ` Alexander Graf
2009-03-02 18:53 ` [Qemu-devel] Re: [PATCH 1/3] PPC: Circumvent overflow in mtcrf Blue Swirl
2009-03-02 22:45 ` Laurent Desnogues [this message]
2009-03-03 10:26 ` [Qemu-devel] " Alexander Graf
2009-03-03 10:30 ` Laurent Desnogues
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