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Date: Sun, 28 Jun 2009 23:24:39 +0200
Message-ID: <761ea48b0906281424p5966022erbcb20143c06fd6b3@mail.gmail.com>
Subject: Re: OT: TCG SSA, speed, misc (was Re: [Qemu-devel] Re: [PATCH 08/11]
	QMP: Port balloon command)
From: Laurent Desnogues <laurent.desnogues@gmail.com>
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To: Filip Navara <filip.navara@gmail.com>
Cc: Anthony Liguori <aliguori@us.ibm.com>, ehabkost@redhat.com, jan.kiszka@siemens.com, dlaor@redhat.com, qemu-devel@nongnu.org, Luiz Capitulino <lcapitulino@redhat.com>, Blue Swirl <blauwirbel@gmail.com>, Avi Kivity <avi@redhat.com>

On Sun, Jun 28, 2009 at 8:19 PM, Filip Navara<filip.navara@gmail.com> wrote:
> Doing a profiling run on several ARM demo programs showed that most of
> the generated code was doing load/store operations to the machine
> registers (in CPU_env). Sample run of FreeRTOS looked like this (OP
> counts):
>
> movi_i32 1603
> ld_i32 1305
> st_i32 1174
> add_i32 530
> ...
>
> If there could be done something that would allow the guest registers
> to be stored in host registers, even if for a temporary amount of time
> it would certainly help the guests that I'm dealing with.

TCG does a good job for register allocation.

The problem you have here is that the ARM translator
isn't using tcg_global_mem_new_i32 for ARM registers.

Here's an example of number of ops I see when using
tcg_global_mem_new_i32:

exit_tb 4991
add_i32 7945
st_i32 8257
movi_i32 26812
mov_i32 38369

And with the trunk:

exit_tb 4957
add_i32 8165
st_i32 20281
ld_i32 21926
movi_i32 25083


Laurent