[Qemu-devel] [PATCH 01/12] target-arm: fix resource leak in gen_set_cpsr macro

[Qemu-devel] [PATCH 01/12] target-arm: fix resource leak in gen_set_cpsr macro

[Juha.Riihimaki]

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Current implementation of the gen_set_cpsr macro creates a new  
temporary tcg variable through the tcg_const_i32 call but never marks  
it dead.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
---
diff --git a/target-arm/translate.c b/target-arm/translate.c
index bc51bcb..bda105e 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -184,7 +184,12 @@ static void store_reg(DisasContext *s, int reg,  
TCGv var)
  #define gen_uxtb16(var) gen_helper_uxtb16(var, var)


-#define gen_set_cpsr(var, mask) gen_helper_cpsr_write(var,  
tcg_const_i32(mask))
+#define gen_set_cpsr(var, mask) \
+{ \
+    TCGv tmp_mask = tcg_const_i32(mask); \
+    gen_helper_cpsr_write(var, tmp_mask); \
+    tcg_temp_free_i32(tmp_mask); \
+}
  /* Set NZCV flags from the high 4 bits of var.  */
  #define gen_set_nzcv(var) gen_set_cpsr(var, CPSR_NZCV)

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diff --git a/target-arm/translate.c b/target-arm/translate.c
index bc51bcb..bda105e 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -184,7 +184,12 @@ static void store_reg(DisasContext *s, int reg, TCGv var)
 #define gen_uxtb16(var) gen_helper_uxtb16(var, var)
 
 
-#define gen_set_cpsr(var, mask) gen_helper_cpsr_write(var, tcg_const_i32(mask))
+#define gen_set_cpsr(var, mask) \
+{ \
+    TCGv tmp_mask = tcg_const_i32(mask); \
+    gen_helper_cpsr_write(var, tmp_mask); \
+    tcg_temp_free_i32(tmp_mask); \
+}
 /* Set NZCV flags from the high 4 bits of var.  */
 #define gen_set_nzcv(var) gen_set_cpsr(var, CPSR_NZCV)
 

Re: [Qemu-devel] [PATCH 01/12] target-arm: fix resource leak in gen_set_cpsr macro

[Laurent Desnogues]

On Wed, Oct 21, 2009 at 12:17 PM,  <Juha.Riihimaki@nokia.com> wrote:
> Current implementation of the gen_set_cpsr macro creates a new
> temporary tcg variable through the tcg_const_i32 call but never marks
> it dead.
>
> Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
> ---
> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index bc51bcb..bda105e 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -184,7 +184,12 @@ static void store_reg(DisasContext *s, int reg,
> TCGv var)
>  #define gen_uxtb16(var) gen_helper_uxtb16(var, var)
>
>
> -#define gen_set_cpsr(var, mask) gen_helper_cpsr_write(var,
> tcg_const_i32(mask))
> +#define gen_set_cpsr(var, mask) \
> +{ \
> +    TCGv tmp_mask = tcg_const_i32(mask); \
> +    gen_helper_cpsr_write(var, tmp_mask); \
> +    tcg_temp_free_i32(tmp_mask); \
> +}
>  /* Set NZCV flags from the high 4 bits of var.  */
>  #define gen_set_nzcv(var) gen_set_cpsr(var, CPSR_NZCV)

Again personal taste:  why not make gen_set_cpsr a static
inline function.

Apart from that, it's OK.


Laurent