From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1N0Yjn-0002JO-Ke for qemu-devel@nongnu.org; Wed, 21 Oct 2009 06:48:15 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1N0Yjl-0002HF-Kn for qemu-devel@nongnu.org; Wed, 21 Oct 2009 06:48:13 -0400 Received: from [199.232.76.173] (port=48801 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N0Yjk-0002Gp-AM for qemu-devel@nongnu.org; Wed, 21 Oct 2009 06:48:12 -0400 Received: from fg-out-1718.google.com ([72.14.220.153]:56371) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1N0Yjj-0004wi-Rg for qemu-devel@nongnu.org; Wed, 21 Oct 2009 06:48:12 -0400 Received: by fg-out-1718.google.com with SMTP id d23so2802600fga.10 for ; Wed, 21 Oct 2009 03:48:10 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <59832F36-4565-4EEA-9BC7-844463C2BE3B@nokia.com> References: <59832F36-4565-4EEA-9BC7-844463C2BE3B@nokia.com> Date: Wed, 21 Oct 2009 12:48:10 +0200 Message-ID: <761ea48b0910210348g2d8a450l7aede31e7ed23dc9@mail.gmail.com> Subject: Re: [Qemu-devel] [PATCH 01/12] target-arm: fix resource leak in gen_set_cpsr macro From: Laurent Desnogues Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Juha.Riihimaki@nokia.com Cc: qemu-devel@nongnu.org On Wed, Oct 21, 2009 at 12:17 PM, wrote: > Current implementation of the gen_set_cpsr macro creates a new > temporary tcg variable through the tcg_const_i32 call but never marks > it dead. > > Signed-off-by: Juha Riihim=E4ki > --- > diff --git a/target-arm/translate.c b/target-arm/translate.c > index bc51bcb..bda105e 100644 > --- a/target-arm/translate.c > +++ b/target-arm/translate.c > @@ -184,7 +184,12 @@ static void store_reg(DisasContext *s, int reg, > TCGv var) > =A0#define gen_uxtb16(var) gen_helper_uxtb16(var, var) > > > -#define gen_set_cpsr(var, mask) gen_helper_cpsr_write(var, > tcg_const_i32(mask)) > +#define gen_set_cpsr(var, mask) \ > +{ \ > + =A0 =A0TCGv tmp_mask =3D tcg_const_i32(mask); \ > + =A0 =A0gen_helper_cpsr_write(var, tmp_mask); \ > + =A0 =A0tcg_temp_free_i32(tmp_mask); \ > +} > =A0/* Set NZCV flags from the high 4 bits of var. =A0*/ > =A0#define gen_set_nzcv(var) gen_set_cpsr(var, CPSR_NZCV) Again personal taste: why not make gen_set_cpsr a static inline function. Apart from that, it's OK. Laurent