From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1N1kTE-0002ED-NF for qemu-devel@nongnu.org; Sat, 24 Oct 2009 13:32:04 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1N1kTD-0002Do-9k for qemu-devel@nongnu.org; Sat, 24 Oct 2009 13:32:03 -0400 Received: from [199.232.76.173] (port=58332 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N1kTD-0002Dl-4n for qemu-devel@nongnu.org; Sat, 24 Oct 2009 13:32:03 -0400 Received: from fg-out-1718.google.com ([72.14.220.153]:6518) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1N1kTC-0006ty-LH for qemu-devel@nongnu.org; Sat, 24 Oct 2009 13:32:02 -0400 Received: by fg-out-1718.google.com with SMTP id d23so3786041fga.10 for ; Sat, 24 Oct 2009 10:32:01 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1256386749-85299-8-git-send-email-juha.riihimaki@nokia.com> References: <1256386749-85299-1-git-send-email-juha.riihimaki@nokia.com> <1256386749-85299-8-git-send-email-juha.riihimaki@nokia.com> Date: Sat, 24 Oct 2009 19:32:01 +0200 Message-ID: <761ea48b0910241032m50bfc94bl48dee9190709ff01@mail.gmail.com> Subject: Re: [Qemu-devel] [PATCH v2 07/10] target-arm: optimize thumb2 load/store multiple ops From: Laurent Desnogues Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: juha.riihimaki@nokia.com Cc: qemu-devel@nongnu.org On Sat, Oct 24, 2009 at 2:19 PM, wrote: > From: Juha Riihim=E4ki > > Thumb2 load/store multiple instructions can be slightly optimized by > loading the register offset constant into a variable outside the > register loop and using the preloaded variable inside the loop instead > of reloading the offset value to a temporary variable on each loop > iteration. This causes less TCG ops to be generated for a Thumb2 load/ > store multiple instruction if there are more than one register > accessed, otherwise the amount of generated TCG ops will be the same. > > Signed-off-by: Juha Riihim=E4ki Acked-by: Laurent Desnogues Laurent > --- > =A0target-arm/translate.c | =A0 =A04 +++- > =A01 files changed, 3 insertions(+), 1 deletions(-) > > diff --git a/target-arm/translate.c b/target-arm/translate.c > index 9e924d4..353f638 100644 > --- a/target-arm/translate.c > +++ b/target-arm/translate.c > @@ -7374,6 +7374,7 @@ static int disas_thumb2_insn(CPUState *env, DisasCo= ntext *s, uint16_t insn_hw1) > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 tcg_gen_addi_i32(addr, addr, -off= set); > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } > > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0tmp2 =3D tcg_const_i32(4); > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 for (i =3D 0; i < 16; i++) { > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if ((insn & (1 << i)) =3D=3D 0) > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 continue; > @@ -7390,8 +7391,9 @@ static int disas_thumb2_insn(CPUState *env, DisasCo= ntext *s, uint16_t insn_hw1) > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 tmp =3D load_reg(s, i); > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 gen_st32(tmp, addr, IS_US= ER(s)); > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0tcg_gen_addi_i32(addr, addr, 4); > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0tcg_gen_add_i32(addr, addr, tmp2= ); > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0tcg_temp_free_i32(tmp2); > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (insn & (1 << 21)) { > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* Base register writeback. =A0*/ > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (insn & (1 << 24)) { > -- > 1.6.5 > > > >